公开(公告)号：US08977871B2

公开(公告)日：2015-03-10

申请号：US13107133

申请日：2011-05-13

申请人： Di Tang ,  Vincent Zimmer ,  James Edwards ,  Rahul Khanna ,  Yufu Li ,  Abdul Bailey

发明人： Di Tang ,  Vincent Zimmer ,  James Edwards ,  Rahul Khanna ,  Yufu Li ,  Abdul Bailey

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/3228 ,  G06F1/3243 ,  G06F9/4401 ,  G06F9/4418 ,  Y02D10/152 ,  Y02D10/44 ,  Y02D50/20

摘要： A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.

摘要翻译： 一种系统包括多个处理器核。 处理器核心可以包括一个或多个应用处理器（AP）核心和引导带处理器（BSP）核心。 基本输入/输出系统（BIOS）包括响应于I / O操作来调用失速功能的I / O设备模块，耦合到I / O设备的电源管理模块和耦合到I / O设备的定时器模块 电源管理模块 电源管理模块是根据失速功能的停止延迟来调整定时器模块的定时器周期。 功率管理模块可以挂起失速功能并将失速延迟与预定阈值进行比较，并响应于确定失速延迟更长而将定时器周期设置为失速延迟。 电源管理模块可以在定时器周期内将BSP置于睡眠模式，以节省电力。

公开(公告)号：US20120159204A1

公开(公告)日：2012-06-21

申请号：US13107133

申请日：2011-05-13

申请人： Di Tang ,  Vincent Zimmer ,  James Edwards ,  Rahul Khanna ,  Yufu Li ,  Abdul Bailey

发明人： Di Tang ,  Vincent Zimmer ,  James Edwards ,  Rahul Khanna ,  Yufu Li ,  Abdul Bailey

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/3228 ,  G06F1/3243 ,  G06F9/4401 ,  G06F9/4418 ,  Y02D10/152 ,  Y02D10/44 ,  Y02D50/20

摘要： A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.

摘要翻译： 一种系统包括多个处理器核。 处理器核心可以包括一个或多个应用处理器（AP）核心和引导带处理器（BSP）核心。 基本输入/输出系统（BIOS）包括响应于I / O操作来调用失速功能的I / O设备模块，耦合到I / O设备的电源管理模块和耦合到I / 电源管理模块 电源管理模块是根据失速功能的停止延迟来调整定时器模块的定时器周期。 功率管理模块可以挂起失速功能并将失速延迟与预定阈值进行比较，并响应于确定失速延迟更长而将定时器周期设置为失速延迟。 电源管理模块可以在定时器周期内将BSP置于睡眠模式，以节省电力。

公开(公告)号：US08607040B2

公开(公告)日：2013-12-10

申请号：US12947485

申请日：2010-11-16

申请人： Vincent J. Zimmer ,  Abdul M. Bailey ,  James W. Edwards ,  Rahul Khanna ,  Yu Fu Li ,  Di Tang

发明人： Vincent J. Zimmer ,  Abdul M. Bailey ,  James W. Edwards ,  Rahul Khanna ,  Yu Fu Li ,  Di Tang

IPC分类号： G06F9/00 ,  G06F15/177

CPC分类号： G06F1/3206 ,  G06F1/3203 ,  G06F9/4418 ,  Y02D10/44

摘要： Methods and apparatuses for re-instantiating a firmware environment that includes one or more firmware functions available at pre-boot time when transitioning the computing device from a first, higher power consumption state to a second, lower power consumption state. The firmware environment determines whether a cryptographic signature on a firmware volume is verified; whether hardware resources of the computing device requested by a manifest of the firmware volume are available; and whether a firmware module of the firmware volume is compatible with installed firmware of the firmware environment. If so, the firmware environment reserves space in a memory to accommodate resources used by the firmware module, and executes the firmware module with the computing device in the second, lower power consumption state.

摘要翻译： 固件环境的重新实例化的方法和装置，其包括在将计算设备从第一较高功耗状态转换到第二较低功耗状态时在预引导时可用的一个或多个固件功能。 固件环境确定固件卷上的加密签名是否被验证; 硬件资源清单请求的计算设备的硬件资源是否可用; 以及固件卷的固件模块是否与固件环境的已安装固件兼容。 如果是，则固件环境保留存储器中的空间以容纳固件模块使用的资源，并且在第二次较低功耗状态下用计算设备执行固件模块。

公开(公告)号：US08386618B2

公开(公告)日：2013-02-26

申请号：US12889583

申请日：2010-09-24

申请人： Abdul M. Bailey ,  Di Tang ,  Rahul Khanna ,  Vincent J. Zimmer ,  Kevin Y. Li ,  James W. Edwards

发明人： Abdul M. Bailey ,  Di Tang ,  Rahul Khanna ,  Vincent J. Zimmer ,  Kevin Y. Li ,  James W. Edwards

IPC分类号： G06F15/16 ,  G06F15/177 ,  G06F15/173

CPC分类号： H04W76/02 ,  G06F9/4401 ,  G06F9/4411 ,  H04W4/50 ,  H04W4/60 ,  H04W76/10

摘要： A system, device, and method for facilitating wireless communications during a pre-boot phase of a computing device includes establishing a communications interface between a unified extensible firmware interface executed on the computing device and a wireless transceiver of the computing device during a pre-boot phase of the computing device. An OOB processor of the computing device processes data communications between the unified extensible firmware interface and the wireless communication circuit during the pre-boot phase by reformatting the data communications between wired and wireless communication standards.

摘要翻译： 用于在计算设备的预引导阶段促进无线通信的系统，设备和方法包括在预引导期间在计算设备上执行的统一的可扩展固件接口与计算设备的无线收发器之间建立通信接口 计算设备的相位。 计算设备的OOB处理器通过重新格式化有线和无线通信标准之间的数据通信，在预引导阶段处理统一的可扩展固件接口和无线通信电路之间的数据通信。

公开(公告)号：US20120079118A1

公开(公告)日：2012-03-29

申请号：US12889583

申请日：2010-09-24

申请人： Abdul M. Bailey ,  Di Tang ,  Rahul Khanna ,  Vincent J. Zimmer ,  Kevin Y. Li ,  James W. Edwards

发明人： Abdul M. Bailey ,  Di Tang ,  Rahul Khanna ,  Vincent J. Zimmer ,  Kevin Y. Li ,  James W. Edwards

IPC分类号： G06F15/16

CPC分类号： H04W76/02 ,  G06F9/4401 ,  G06F9/4411 ,  H04W4/50 ,  H04W4/60 ,  H04W76/10

摘要： A system, device, and method for facilitating wireless communications during a pre-boot phase of a computing device includes establishing a communications interface between a unified extensible firmware interface executed on the computing device and a wireless transceiver of the computing device during a pre-boot phase of the computing device. An OOB processor of the computing device processes data communications between the unified extensible firmware interface and the wireless communication circuit during the pre-boot phase by reformatting the data communications between wired and wireless communication standards.

摘要翻译： 用于在计算设备的预引导阶段促进无线通信的系统，设备和方法包括在预引导期间在计算设备上执行的统一的可扩展固件接口与计算设备的无线收发器之间建立通信接口 计算设备的相位。 计算设备的OOB处理器通过重新格式化有线和无线通信标准之间的数据通信，在预引导阶段处理统一的可扩展固件接口和无线通信电路之间的数据通信。

公开(公告)号：US20120124357A1

公开(公告)日：2012-05-17

申请号：US12947485

申请日：2010-11-16

申请人： Vincent J. Zimmer ,  Abdul M. Bailey ,  James W. Edwards ,  Rahul Khanna ,  Yu Fu Li ,  Di Tang

发明人： Vincent J. Zimmer ,  Abdul M. Bailey ,  James W. Edwards ,  Rahul Khanna ,  Yu Fu Li ,  Di Tang

IPC分类号： G06F9/06 ,  G06F21/22

CPC分类号： G06F1/3206 ,  G06F1/3203 ,  G06F9/4418 ,  Y02D10/44

摘要： Methods and apparatuses for re-instantiating a firmware environment that includes one or more firmware functions available at pre-boot time when transitioning the computing device from a first, higher power consumption state to a second, lower power consumption state. The firmware environment determines whether a cryptographic signature on a firmware volume is verified; whether hardware resources of the computing device requested by a manifest of the firmware volume are available; and whether a firmware module of the firmware volume is compatible with installed firmware of the firmware environment. If so, the firmware environment reserves space in a memory to accommodate resources used by the firmware module, and executes the firmware module with the computing device in the second, lower power consumption state.

摘要翻译： 固件环境的重新实例化的方法和装置，其包括在将计算设备从第一较高功耗状态转换到第二较低功耗状态时在预引导时可用的一个或多个固件功能。 固件环境确定固件卷上的加密签名是否被验证; 硬件资源清单请求的计算设备的硬件资源是否可用; 以及固件卷的固件模块是否与固件环境的已安装固件兼容。 如果是，则固件环境保留存储器中的空间以容纳固件模块使用的资源，并且在第二次较低功耗状态下用计算设备执行固件模块。

公开(公告)号：US20130311665A1

公开(公告)日：2013-11-21

申请号：US13775630

申请日：2013-02-25

申请人： Abdul M. Bailey ,  Di Tang ,  Rahul Khanna ,  Vincent J. Zimmer ,  Kevin Y. Li ,  James W. Edwards

发明人： Abdul M. Bailey ,  Di Tang ,  Rahul Khanna ,  Vincent J. Zimmer ,  Kevin Y. Li ,  James W. Edwards

IPC分类号： H04W76/02

CPC分类号： H04W4/50 ,  G06F9/4401 ,  G06F9/4411 ,  H04W4/60 ,  H04W76/10

摘要： A system, device, and method for facilitating wireless communications during a pre-boot phase of a computing device includes establishing a communications interface between a unified extensible firmware interface executed on the computing device and a wireless transceiver of the computing device during a pre-boot phase of the computing device. An OOB processor of the computing device processes data communications between the unified extensible firmware interface and the wireless communication circuit during the pre-boot phase by reformatting the data communications between wired and wireless communication standards.

摘要翻译： 用于在计算设备的预引导阶段促进无线通信的系统，设备和方法包括在预引导期间在计算设备上执行的统一的可扩展固件接口与计算设备的无线收发器之间建立通信接口 计算设备的相位。 计算设备的OOB处理器通过重新格式化有线和无线通信标准之间的数据通信，在预引导阶段处理统一的可扩展固件接口和无线通信电路之间的数据通信。

公开(公告)号：US07149274B2

公开(公告)日：2006-12-12

申请号：US11142264

申请日：2005-06-02

申请人： Di Tang

发明人： Di Tang

IPC分类号： G06M7/00 ,  G06M9/00

CPC分类号： G07D5/00

摘要： The present invention relates to an addressing type coin-dropping detector circuit, in which as any coin dropping and passing through the photo detector, impulses are produced from the detecting points of the external photo detector and then sent to the addressing type coin-dropping detector circuit. Followed by the enumerations performed by the addressing type coin-dropping detector circuit, an impulse-length value is derived and transmitted to the external circuit through addressing mechanism, which increases overall integrated level of the circuit with a more efficient design in terms of memory and circuit utilization.

摘要翻译： 本发明涉及一种寻址型投币检测器电路，其中随着任何硬币丢弃并通过光电检测器，脉冲从外部光电检测器的检测点产生，然后发送到寻址型投币检测器 电路。 随后由寻址型投币检测器电路执行的枚举，导出脉冲长度值并通过寻址机制将其传输到外部电路，从而在存储器方面以更有效的设计提高了电路的整体集成度， 电路利用率。

公开(公告)号：US20050278500A1

公开(公告)日：2005-12-15

申请号：US11142265

申请日：2005-06-02

申请人： Di Tang

发明人： Di Tang

IPC分类号： G06F12/00

CPC分类号： G06F13/1631

摘要： The present invention relates to an addressing type data comparison circuit that uses an addressing system, which enables an external circuit to receive a standard value and a comparison value. Through the process of addressing type data comparison circuit, the addressing type data comparison circuit outputs the operation result to a external circuit. The addressing system of transferring can effectively make use of a memory and economize the design of a circuit, which can enhance the integration of a circuit.

摘要翻译： 本发明涉及使用寻址系统的寻址型数据比较电路，其使得外部电路能够接收标准值和比较值。 通过寻址类型数据比较电路的处理，寻址类型数据比较电路将操作结果输出到外部电路。 传输寻址系统可以有效利用存储器，节省电路设计，从而提高电路的集成度。

公开(公告)号：US07577863B2

公开(公告)日：2009-08-18

申请号：US11135356

申请日：2005-05-24

申请人： Di Tang

发明人： Di Tang

IPC分类号： G06F5/06 ,  H04L12/50 ,  H03K21/08

CPC分类号： H03K21/38

摘要： An addressing type frequency counter circuit is disclosed, which receives a multiple parameter and a clock of addressing input from an external circuit, and uses a hardware address to perform the addressing operation for outputting a clock value, thereby utilizing memory more efficiency, reducing the cost by purchasing less memory to achieve the same performance, and improving integration of the addressing type frequency counter circuit.

摘要翻译： 公开了一种寻址型频率计数器电路，其接收来自外部电路的多个参数和寻址输入的时钟，并且使用硬件地址来执行用于输出时钟值的寻址操作，从而更有效地利用存储器，降低成本 通过购买更少的存储器来实现相同的性能，并改进寻址类型频率计数器电路的集成。