Invention Grant
- Patent Title: Connection of a chip provided with through vias
- Patent Title (中): 连接带通孔的芯片
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Application No.: US13873103Application Date: 2013-04-29
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Publication No.: US08994172B2Publication Date: 2015-03-31
- Inventor: Sylvain Joblot , Pierre Bar
- Applicant: STMicroelectronics SA
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Seed IP Law Group PLLC
- Priority: FR1254061 20120503
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/28 ; H01L21/768 ; H01L23/538 ; H01L23/14 ; H01L23/498 ; H01L21/48
Abstract:
A chip provided with through vias wherein the vias are formed of an opening with insulated walls coated with a conductive material and filled with an easily deformable insulating material, elements of connection to another chip being arranged in front of the easily deformable insulating material.
Public/Granted literature
- US20130292824A1 CONNECTION OF A CHIP PROVIDED WITH THROUGH VIAS Public/Granted day:2013-11-07
Information query
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