发明授权
US09043539B2 Semiconductor device having a memory and calibration circuit that selectively adjusts an impedance of an output buffer dependent upon refresh commands
有权
具有存储器和校准电路的半导体器件，其根据刷新命令有选择地调节输出缓冲器的阻抗
- 专利标题： Semiconductor device having a memory and calibration circuit that selectively adjusts an impedance of an output buffer dependent upon refresh commands
- 专利标题（中）： 具有存储器和校准电路的半导体器件，其根据刷新命令有选择地调节输出缓冲器的阻抗
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申请号： US12923261申请日： 2010-09-10
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公开(公告)号： US09043539B2公开(公告)日： 2015-05-26
- 发明人: Nakaba Kaiwa , Yutaka Ikeda , Hiroki Fujisawa , Tetsuaki Okahiro
- 申请人： Nakaba Kaiwa , Yutaka Ikeda , Hiroki Fujisawa , Tetsuaki Okahiro
- 申请人地址： LU Luxembourg
- 专利权人： PS4 Luxco S.a.r.l.
- 当前专利权人： PS4 Luxco S.a.r.l.
- 当前专利权人地址： LU Luxembourg
- 代理机构： Kunzler Law Group, PC
- 优先权： JP2009-210031 20090911; JP2010-159452 20100714
- 主分类号： G06F12/00
- IPC分类号： G06F12/00 ; G11C7/00 ; G11C11/406 ; G11C7/04 ; G11C7/10 ; G11C7/20 ; G11C11/4072 ; G11C11/4093
摘要：
A semiconductor device having a circuit that selectively adjusts an impedance of an output buffer. A calibration operation can be performed automatically without issuing a calibration command from a controller. Because a calibration operation to a memory is performed in response to an auto refresh command having been issued for a predetermined number of times, a periodic calibration operation can be secured, and a read operation or a write operation is not requested from a controller during a calibration operation. A start-up circuit activates the calibration circuit when a refresh counter indicates a predetermined value, and prohibits a refresh operation in response to the auto refresh command when the calibration circuit is activated. A temperature detecting circuit may be used to change the frequency of performing a calibration operation.
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