Invention Grant
US09082480B2 Detection and decoding in flash memories with error correlations for a plurality of bits within a sliding window
有权
在滑动窗口内的多个位的误差相关的闪速存储器中进行检测和解码
- Patent Title: Detection and decoding in flash memories with error correlations for a plurality of bits within a sliding window
- Patent Title (中): 在滑动窗口内的多个位的误差相关的闪速存储器中进行检测和解码
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Application No.: US13780203Application Date: 2013-02-28
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Publication No.: US09082480B2Publication Date: 2015-07-14
- Inventor: Adbel Hakim S. Alhussien , Wu Chang , Erich F. Haratsch , Ming Jin
- Applicant: LSI Corporation
- Applicant Address: US CA Cupertino
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Cupertino
- Agency: Ryan, Mason & Lewis, LLP
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04 ; G11C11/56

Abstract:
Methods and apparatus are provided for detection and decoding in flash memories with error correlations for a plurality of bits within a sliding window. Data from a flash memory device is processed by obtaining one or more read values for a plurality of bits from one or more pages of the flash memory device; converting the one or more read values for the plurality of bits to a non-binary log likelihood ratio based on a probability that a given data pattern was written to the plurality of bits when a particular pattern was read from the plurality of bits; and decoding the plurality of bits using a binary decoder. The non-binary log likelihood ratio captures one or more of intra-page correlations and/or intra-cell correlations. A least significant bit and a most significant bit of a given cell can be independently converted and/or jointly converted to the non-binary log likelihood ratio.
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