Invention Grant
US09117492B2 Method and apparatus for adjusting drain bias of a memory cell with addressed and neighbor bits 有权
用于调整具有寻址和相邻位的存储单元的漏极偏置的方法和装置

Method and apparatus for adjusting drain bias of a memory cell with addressed and neighbor bits
Abstract:
The storage layer such as a nitride layer of a nonvolatile memory cell has two storage parts storing separately addressable data, typically respectively proximate to the source terminal and the drain terminal. The applied drain voltage while sensing the data of one of the storage parts depends on the data stored at the other storage part. If the data stored at the other storage part is represented by a threshold voltage exceeding a minimum threshold voltage, then the applied drain voltage is raised. This technology is useful in read operations and program verify operations to widen the threshold voltage window.
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