Invention Grant
- Patent Title: Manufacturing method and test method of semiconductor device
- Patent Title (中): 半导体器件的制造方法和测试方法
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Application No.: US14557888Application Date: 2014-12-02
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Publication No.: US09136188B2Publication Date: 2015-09-15
- Inventor: Hiromichi Godo , Shuhei Yoshitomi
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2010-145410 20100625
- Main IPC: G01R31/26
- IPC: G01R31/26 ; H01L21/66 ; H01L29/66 ; H01L29/786 ; G01R31/311

Abstract:
Provided is a test method by which a transistor whose reliability is low can be detected with low stress and high accuracy in a shorter period of time than a BT test. Provided is to detect a transistor whose reliability is high in a shorter period of time than a BT test and manufacture an electronic device with high reliability efficiently. Hysteresis characteristics revealed in the result of the Vg-Id measurement with light irradiation to the transistor correlate with the result of a BT test; whether the reliability of the transistor is Good or Not-Good can be judged. Accordingly, the test method by which a transistor whose reliability is low can be detected with low stress and high accuracy in a shorter period of time than a BT test can be provided.
Public/Granted literature
- US20150087091A1 MANUFACTURING METHOD AND TEST METHOD OF SEMICONDUCTOR DEVICE Public/Granted day:2015-03-26
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