发明授权
US09141386B2 Vector logical reduction operation implemented using swizzling on a semiconductor chip
有权
使用在半导体芯片上进行旋转实现的矢量逻辑减少操作
- 专利标题： Vector logical reduction operation implemented using swizzling on a semiconductor chip
- 专利标题（中）： 使用在半导体芯片上进行旋转实现的矢量逻辑减少操作
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申请号： US12890485申请日： 2010-09-24
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公开(公告)号： US09141386B2公开(公告)日： 2015-09-22
- 发明人: Jeff Wiedemeier , Sridhar Samudrala , Roger Golliver
- 申请人： Jeff Wiedemeier , Sridhar Samudrala , Roger Golliver
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Nicholson De Vos Webster & Elliott, LLP
- 主分类号： G06F9/305
- IPC分类号： G06F9/305 ; G06F9/30 ; G06F15/76 ; G06F9/06 ; G06F7/00
摘要：
A semiconductor processor is described. The semiconductor processor includes logic circuitry to perform a logical reduction instruction. The logic circuitry has swizzle circuitry to swizzle a vector's elements so as to form a swizzle vector. The logic circuitry also has vector logic circuitry to perform a vector logic operation on said vector and said swizzle vector.
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