Aspects of the preset disclosure are directed to processing an analog signal transmitted during active portions of a duty cycle. As may be implemented in accordance with one or more embodiments, an apparatus includes a high-speed sampling circuit that samples portions of such an analog signal at a first rate corresponding to the active portion of the duty cycle, and stores the sampled portions of the analog signal. A low-speed analog-to-digital converter accesses the stored sampled portions and converts the sampled portions to a digital form at a second rate that is slower than the first rate.