Invention Grant
US09164829B2 Read bias management to reduce read errors for phase change memory
有权
读取偏差管理以减少相变存储器的读取错误
- Patent Title: Read bias management to reduce read errors for phase change memory
- Patent Title (中): 读取偏差管理以减少相变存储器的读取错误
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Application No.: US14269869Application Date: 2014-05-05
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Publication No.: US09164829B2Publication Date: 2015-10-20
- Inventor: Ferdinando Bedeschi
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: G11C29/50
- IPC: G11C29/50 ; G06F11/10 ; G11C13/00 ; G11C29/02 ; G11C29/42 ; G11C29/52

Abstract:
During a read process for a memory device, such as a phase change memory device, a bias condition can be applied to a memory cell to determine the memory cell's state. The determined state of the memory cell can depend on a threshold voltage of the memory cell. The threshold voltage of the memory cell may shift over time. The shift in threshold voltage may result in read errors. The applied bias condition may be modified based on the resulting read errors.
Public/Granted literature
- US20140325314A1 READ BIAS MANAGEMENT TO REDUCE READ ERRORS FOR PHASE CHANGE MEMORY Public/Granted day:2014-10-30
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