Invention Grant
- Patent Title: Three dimensional dual-port bit cell and method of using same
- Patent Title (中): 三维双端口位单元及其使用方法
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Application No.: US14032222Application Date: 2013-09-20
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Publication No.: US09171849B2Publication Date: 2015-10-27
- Inventor: Wei Min Chan , Wei-Cheng Wu , Yen-Huei Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G11C5/06
- IPC: G11C5/06 ; H01L27/11 ; G11C11/412 ; G11C11/413 ; G11C8/16 ; H01L27/06 ; G11C5/02 ; G11C8/08
Abstract:
A three dimensional dual-port bit cell generally comprises a first portion disposed on a first tier, wherein the first portion includes a plurality of port elements. The dual-port bit cell also includes a second portion disposed on a second tier that is vertically stacked with respect to the first tier using at least one via, wherein the second portion includes a latch.
Public/Granted literature
- US20150085556A1 THREE DIMENSIONAL DUAL-PORT BIT CELL AND METHOD OF USING SAME Public/Granted day:2015-03-26
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