Invention Grant
- Patent Title: Semiconductor device having a trench gate structure and manufacturing method of the same
- Patent Title (中): 具有沟槽栅极结构的半导体器件及其制造方法
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Application No.: US14278430Application Date: 2014-05-15
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Publication No.: US09171906B2Publication Date: 2015-10-27
- Inventor: Eiichi Taketani , Seigo Oosawa
- Applicant: DENSO CORPORATION
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2011-88573 20110412; JP2011-101811 20110428; JP2012-39017 20120224
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78 ; H01L29/10 ; H01L21/28 ; H01L29/08 ; H01L29/66 ; H01L21/265 ; H01L29/06 ; H01L29/417 ; H01L29/423 ; H01L29/739

Abstract:
In a manufacturing method of a semiconductor device, a trench is defined in a semiconductor substrate, and an adjuster layer having a first conductivity type impurity concentration higher than a drift layer is formed at a portion of the semiconductor substrate adjacent to a bottom wall of the trench. A channel layer is formed by introducing second conductivity type impurities to a portion of the semiconductor substrate adjacent to a sidewall of the trench and between the adjustment layer and a main surface of the semiconductor substrate while restricting the channel layer from extending in a depth direction of the trench by the adjustment layer.
Public/Granted literature
- US20140246718A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2014-09-04
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