Invention Grant
- Patent Title: Electrostatic discharge protection for three dimensional integrated circuit
- Patent Title (中): 静电放电保护用于三维集成电路
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Application No.: US13667072Application Date: 2012-11-02
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Publication No.: US09172242B2Publication Date: 2015-10-27
- Inventor: Tzu-Heng Chang , Jen-Chou Tseng , Ming-Hsiang Song
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: H02H9/00
- IPC: H02H9/00 ; H02H9/04

Abstract:
The present disclosure provides a three dimensional integrated circuit having a plurality of dies. Each die includes a trigger line common to the other dies, the trigger line controlling the power of a power clamp in each respective die, a dedicated electrostatic discharge (ESD) line for each respective die, and an ESD detection circuit connected to the dedicated ESD line and to a first power line common to the other dies. When an input signal is received by the ESD detection circuit of one of the plural dies, the ESD detection circuit generates an output signal to the common trigger line to supply power to the power clamp in each of the plural dies to clamp ESD voltage or current to the common first power line or a second power line.
Public/Granted literature
- US20140126089A1 ELECTROSTATIC DISCHARGE PROTECTION FOR THREE DIMENSIONAL INTEGRATED CIRCUIT Public/Granted day:2014-05-08
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