Invention Grant
- Patent Title: Memory interface offset signaling
- Patent Title (中): 存储器接口偏移信号
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Application No.: US13842515Application Date: 2013-03-15
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Publication No.: US09177623B2Publication Date: 2015-11-03
- Inventor: Shree Krishna Pandey , Dexter T. Chun
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: US CA San Diego
- Agency: Seyfarth Shaw LLP
- Main IPC: G06F1/10
- IPC: G06F1/10 ; G11C7/22 ; G06F13/16 ; G06F13/42
Abstract:
A memory interface includes circuitry configured for applying a variable delay to a portion of a data signal and applying a variable delay to a data strobe. The delayed data strobe samples the delayed portion of the data signal. Delayed portions of the data signal are spaced away from non-delayed portions of the data signal by alternating the routing of delayed bits and non-delayed bits of the data signal. A training block determines and sets a value of the variable delay corresponding to a largest value of a number of recorded eye aperture widths.
Public/Granted literature
- US20140281328A1 MEMORY INTERFACE OFFSET SIGNALING Public/Granted day:2014-09-18
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