Invention Grant
US09184121B2 Stacked synchronous buck converter having chip embedded in outside recess of leadframe
有权
堆叠同步降压转换器，其芯片嵌入引线框架的外部凹槽中
- Patent Title: Stacked synchronous buck converter having chip embedded in outside recess of leadframe
- Patent Title (中): 堆叠同步降压转换器，其芯片嵌入引线框架的外部凹槽中
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Application No.: US14173147Application Date: 2014-02-05
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Publication No.: US09184121B2Publication Date: 2015-11-10
- Inventor: Osvaldo Jorge Lopez , Johathan A. Noquil
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Steven A. Shaw; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L25/16 ; H01L23/00 ; H01L25/00 ; H01L23/31 ; H01L21/56 ; H01L25/065
Abstract:
A power supply system (200) has a QFN leadframe with leads and a pad (201, switch node terminal); a pad surface having a portion recessed with a depth (270) and an outline suitable for attaching a semiconductor chip. A first FET chip (220) is vertically stacked to the opposite pad surface. A clip (240) is vertically stacked on the first FET chip and tied to a lead (202, grounded output terminal). A second FET chip (210) has its source terminal attached to the recessed portion and its drain (210a, input terminal) and gate (210b) terminals co-planar with the un-recessed portion. A driver-and-controller chip (230) is attached to the clip. Packaging compound (290) encapsulates the parts but leaves a pad surface and the drain and gate terminals of the second FET chip un-encapsulated.
Public/Granted literature
- US20150221584A1 Stacked Synchronous Buck Converter Having Chip Embedded in Outside Recess of Leadframe Public/Granted day:2015-08-06
Information query
IPC分类:
