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1.发明申请Stacked Synchronous Buck Converter Having Chip Embedded in Outside Recess of Leadframe 有权堆叠式同步降压转换器，将芯片嵌入到引线框架的外部凹槽中公开(公告)号：US20150221584A1
公开(公告)日：2015-08-06
申请号：US14173147
申请日：2014-02-05
CPC分类号： H01L23/49575 , H01L21/56 , H01L23/3107 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/84 , H01L24/85 , H01L24/92 , H01L25/0657 , H01L25/165 , H01L25/50 , H01L2224/27312 , H01L2224/291 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/32145 , H01L2224/32147 , H01L2224/32148 , H01L2224/32245 , H01L2224/33181 , H01L2224/37013 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40499 , H01L2224/4103 , H01L2224/41051 , H01L2224/48091 , H01L2224/48106 , H01L2224/48111 , H01L2224/48145 , H01L2224/48247 , H01L2224/4911 , H01L2224/49111 , H01L2224/49171 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/73271 , H01L2224/83191 , H01L2224/83192 , H01L2224/83439 , H01L2224/83444 , H01L2224/83455 , H01L2224/83464 , H01L2224/83801 , H01L2224/83815 , H01L2224/8385 , H01L2224/83851 , H01L2224/83862 , H01L2224/8391 , H01L2224/84439 , H01L2224/84444 , H01L2224/84447 , H01L2224/84455 , H01L2224/84464 , H01L2224/84801 , H01L2224/84815 , H01L2224/8491 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/85464 , H01L2224/92147 , H01L2224/92157 , H01L2224/9221 , H01L2224/92242 , H01L2224/92247 , H01L2224/92252 , H01L2225/0651 , H01L2924/00014 , H01L2924/1306 , H01L2924/13091 , H01L2924/1425 , H01L2924/14252 , H01L2924/1426 , H01L2924/181 , H01L2924/00 , H01L2224/45015 , H01L2924/20752 , H01L2224/45099 , H01L2924/00012 , H01L2924/014 , H01L2924/0665 , H01L2924/07811 , H01L2924/07812 , H01L2224/83447 , H01L2224/83 , H01L2224/84 , H01L2224/85 , H01L2224/27
摘要： A power supply system (200) has a QFN leadframe with leads and a pad (201, switch node terminal); a pad surface having a portion recessed with a depth (270) and an outline suitable for attaching a semiconductor chip. A first FET chip (220) is vertically stacked to the opposite pad surface. A clip (240) is vertically stacked on the first FET chip and tied to a lead (202, grounded output terminal). A second FET chip (210) has its source terminal attached to the recessed portion and its drain (210a, input terminal) and gate (210b) terminals co-planar with the un-recessed portion. A driver-and-controller chip (230) is attached to the clip. Packaging compound (290) encapsulates the parts but leaves a pad surface and the drain and gate terminals of the second FET chip un-encapsulated.
摘要翻译： 电源系统（200）具有带导线和焊盘（201，开关节点端子）的QFN引线框架; 垫表面，其具有凹入深度（270）的部分和适合于附接半导体芯片的轮廓。 第一FET芯片（220）垂直地堆叠到相对的焊盘表面。 夹子（240）垂直堆叠在第一FET芯片上并连接到引线（202，接地输出端子）。 第二FET芯片（210）的源极端子连接到凹部，其漏极（210a，输入端子）和栅极（210b）端子与未凹入部分共面。 驱动器和控制器芯片（230）附接到夹子。 包装化合物（290）封装部件但留下焊盘表面，并且第二FET芯片的漏极和栅极端子未封装。
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2.发明授权Stacked synchronous buck converter having chip embedded in outside recess of leadframe 有权堆叠同步降压转换器，其芯片嵌入引线框架的外部凹槽中公开(公告)号：US09184121B2
公开(公告)日：2015-11-10
申请号：US14173147
申请日：2014-02-05
IPC分类号： H01L23/495 , H01L25/16 , H01L23/00 , H01L25/00 , H01L23/31 , H01L21/56 , H01L25/065
CPC分类号： H01L23/49575 , H01L21/56 , H01L23/3107 , H01L23/49503 , H01L23/49524 , H01L23/49541 , H01L23/49548 , H01L23/49562 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/41 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/84 , H01L24/85 , H01L24/92 , H01L25/0657 , H01L25/165 , H01L25/50 , H01L2224/27312 , H01L2224/291 , H01L2224/2919 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/32145 , H01L2224/32147 , H01L2224/32148 , H01L2224/32245 , H01L2224/33181 , H01L2224/37013 , H01L2224/37147 , H01L2224/40095 , H01L2224/40245 , H01L2224/40499 , H01L2224/4103 , H01L2224/41051 , H01L2224/48091 , H01L2224/48106 , H01L2224/48111 , H01L2224/48145 , H01L2224/48247 , H01L2224/4911 , H01L2224/49111 , H01L2224/49171 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/73271 , H01L2224/83191 , H01L2224/83192 , H01L2224/83439 , H01L2224/83444 , H01L2224/83455 , H01L2224/83464 , H01L2224/83801 , H01L2224/83815 , H01L2224/8385 , H01L2224/83851 , H01L2224/83862 , H01L2224/8391 , H01L2224/84439 , H01L2224/84444 , H01L2224/84447 , H01L2224/84455 , H01L2224/84464 , H01L2224/84801 , H01L2224/84815 , H01L2224/8491 , H01L2224/85439 , H01L2224/85444 , H01L2224/85455 , H01L2224/85464 , H01L2224/92147 , H01L2224/92157 , H01L2224/9221 , H01L2224/92242 , H01L2224/92247 , H01L2224/92252 , H01L2225/0651 , H01L2924/00014 , H01L2924/1306 , H01L2924/13091 , H01L2924/1425 , H01L2924/14252 , H01L2924/1426 , H01L2924/181 , H01L2924/00 , H01L2224/45015 , H01L2924/20752 , H01L2224/45099 , H01L2924/00012 , H01L2924/014 , H01L2924/0665 , H01L2924/07811 , H01L2924/07812 , H01L2224/83447 , H01L2224/83 , H01L2224/84 , H01L2224/85 , H01L2224/27
摘要： A power supply system (200) has a QFN leadframe with leads and a pad (201, switch node terminal); a pad surface having a portion recessed with a depth (270) and an outline suitable for attaching a semiconductor chip. A first FET chip (220) is vertically stacked to the opposite pad surface. A clip (240) is vertically stacked on the first FET chip and tied to a lead (202, grounded output terminal). A second FET chip (210) has its source terminal attached to the recessed portion and its drain (210a, input terminal) and gate (210b) terminals co-planar with the un-recessed portion. A driver-and-controller chip (230) is attached to the clip. Packaging compound (290) encapsulates the parts but leaves a pad surface and the drain and gate terminals of the second FET chip un-encapsulated.
摘要翻译： 电源系统（200）具有带导线和焊盘（201，开关节点端子）的QFN引线框架; 垫表面，其具有凹入深度（270）的部分和适合于附接半导体芯片的轮廓。 第一FET芯片（220）垂直地堆叠到相对的焊盘表面。 夹子（240）垂直堆叠在第一FET芯片上并连接到引线（202，接地输出端子）。 第二FET芯片（210）的源极端子连接到凹部，其漏极（210a，输入端子）和栅极（210b）端子与未凹入部分共面。 驱动器和控制器芯片（230）附接到夹子。 包装化合物（290）封装部件但留下焊盘表面，并且第二FET芯片的漏极和栅极端子未封装。
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