Invention Grant
- Patent Title: Semiconductor device with gate electrodes buried in trenches
- Patent Title (中): 具有掩埋在沟槽中的栅电极的半导体器件
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Application No.: US13851875Application Date: 2013-03-27
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Publication No.: US09184285B2Publication Date: 2015-11-10
- Inventor: Hiroaki Katou , Hiroyoshi Kudou , Taro Moriya , Satoshi Uchiya
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2012-088373 20120409
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/08 ; H01L21/8234 ; H01L27/088 ; H01L29/423 ; H01L29/45 ; H01L29/06
Abstract:
Trenches are formed in a base layer and extend parallel to each other. A gate insulating film is formed on the inner wall of each of multiple trenches. A gate electrode GE is buried in each of the trenches. The source layer is formed in the base layer to a depth less than the base layer. The source layer is disposed between each of the trenches. A second conduction type high concentration layer is formed between the source layer and the trench in a plan view. The trench, the source layer, and the second conduction type high concentration are arranged in this order repetitively in a plan view. One lateral side of the trench faces the source layer and the other lateral side of the trench faces the second conduction type high concentration layer.
Public/Granted literature
- US20130264637A1 SEMICONDUCTOR DEVICE Public/Granted day:2013-10-10
Information query
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