Invention Grant
US09196342B2 Circuit and method for spin-torque MRAM bit line and source line voltage regulation
有权
自旋扭矩MRAM位线和源极线电压调节的电路和方法
- Patent Title: Circuit and method for spin-torque MRAM bit line and source line voltage regulation
- Patent Title (中): 自旋扭矩MRAM位线和源极线电压调节的电路和方法
-
Application No.: US14676100Application Date: 2015-04-01
-
Publication No.: US09196342B2Publication Date: 2015-11-24
- Inventor: Syed M. Alam , Thomas Andre
- Applicant: Everspin Technologies, Inc.
- Applicant Address: US AZ Chandler
- Assignee: Everspin Technologies, Inc.
- Current Assignee: Everspin Technologies, Inc.
- Current Assignee Address: US AZ Chandler
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/16

Abstract:
Circuitry and a method for regulating voltages applied to magnetoresistive bit cells of a spin-torque magnetoresistive random access memory (ST-MRAM) reduces time-dependent dielectric breakdown stress of the word line transistors. During a read or write operation, only the ends of the selected bit cells are pulled down to a low voltage and/or pulled up to a high voltage depending on the operation (write 0, write 1, and read) being performed. The ends of the unselected bit cells are held at a precharge voltage while separately timed signals pull up or pull down the ends of the selected bit cells during read and write operations.
Public/Granted literature
- US20150206570A1 CIRCUIT AND METHOD FOR SPIN-TORQUE MRAM BIT LINE AND SOURCE LINE VOLTAGE REGULATION Public/Granted day:2015-07-23
Information query