发明授权
- 专利标题: Semiconductor device and method of manufacturing the same
- 专利标题(中): 半导体装置及其制造方法
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申请号: US14149908申请日: 2014-01-08
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公开(公告)号: US09209249B2公开(公告)日: 2015-12-08
- 发明人: Tsuyoshi Kachi
- 申请人: Renesas Electronics Corporation
- 申请人地址: JP Tokyo
- 专利权人: Renesas Electronics Corporation
- 当前专利权人: Renesas Electronics Corporation
- 当前专利权人地址: JP Tokyo
- 代理机构: Miles & Stockbridge P.C.
- 优先权: JP2013-020722 20130205
- 主分类号: H01L29/76
- IPC分类号: H01L29/76 ; H01L29/06 ; H01L29/66 ; H01L29/78
摘要:
To realize a semiconductor device having a power MOSFET satisfying both a low conduction resistance and a high junction breakdown voltage by a simple and easy manufacturing method. Over an n-type substrate, a p-type epitaxial layer of a low concentration is formed, and, in an active part, a plurality of active regions is defined by a plurality of trenches that is formed in the epitaxial layer and extends in a first direction with first intervals in a second direction orthogonal to the first direction. In the epitaxial layer between the adjacent trenches, an n-type diffusion region that functions as a drain offset layer is formed, and, in the epitaxial layer between a side wall of the trench and the n-type diffusion region, a p-type diffusion region connected with a channel region (the p-type diffusion region) is formed, to constitute a super junction structure. Further, by forming an n-type diffusion region in the epitaxial layer, having a prescribed width from a side wall of a trench lying in the end part of the active part toward an outer periphery part, to achieve the improvement of a drain breakdown voltage.
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