发明授权
- 专利标题： Undercut insulating regions for silicon-on-insulator device
- 专利标题（中）： 用于绝缘体上硅器件的底切绝缘区域
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申请号： US13537141申请日： 2012-06-29
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公开(公告)号： US09214378B2公开(公告)日： 2015-12-15
- 发明人: Kangguo Cheng , Bruce B. Doris , Balasubramanian S. Haran , Shom Ponoth , Theodorus E. Standaert , Tenko Yamashita
- 申请人： Kangguo Cheng , Bruce B. Doris , Balasubramanian S. Haran , Shom Ponoth , Theodorus E. Standaert , Tenko Yamashita
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Cantor Colburn LLP
- 代理商 Steve Meyers
- 主分类号： H01L21/84
- IPC分类号： H01L21/84 ; H01L21/762 ; H01L27/12
摘要：
A method of making a silicon-on-insulator (SOI) semiconductor device includes etching an undercut isolation trench into an SOI substrate, the SOI substrate comprising a bottom substrate, a buried oxide (BOX) layer formed on the bottom substrate, and a top SOI layer formed on the BOX layer, wherein the undercut isolation trench extends through the top SOI layer and the BOX layer and into the bottom substrate such that a portion of the undercut isolation trench is located in the bottom substrate underneath the BOX layer. The undercut isolation trench is filled with an undercut fill comprising an insulating material to form an undercut isolation region. A field effect transistor (FET) device is formed on the top SOI layer adjacent to the undercut isolation region, wherein the undercut isolation region extends underneath a source/drain region of the FET.
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