Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs)

Invention Grant

US09214397B2 Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) 有权

Title translation: 用于调制高K金属栅场效应晶体管（FET）的阈值电压的结构和方法

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Patent Title: Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs)
Patent Title (中): 用于调制高K金属栅场效应晶体管（FET）的阈值电压的结构和方法
Application No.: US13788689

Application Date: 2013-03-07
Publication No.: US09214397B2

Publication Date: 2015-12-15
Inventor: Bruce B. Doris , Kangguo Cheng , Steven J. Holmes , Ali Khakifirooz , Pranita Kerber , Shom Ponoth , Raghavasimhan Sreenivasan , Stefan Schmitz
Applicant: GLOBALFOUNDRIES INC.
Applicant Address: KY Grand Cayman
Assignee: GLOBALFOUNDRIES INC.
Current Assignee: GLOBALFOUNDRIES INC.
Current Assignee Address: KY Grand Cayman
Agency: Scully, Scott, Murphy & Presser P.C.
Main IPC: H01L21/8238
IPC: H01L21/8238

Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs)

Abstract:

A method for forming an electrical device that includes forming a high-k gate dielectric layer over a semiconductor substrate that is patterned to separate a first portion of the high-k gate dielectric layer that is present on a first conductivity device region from a second portion of the high-k gate dielectric layer that is present on a second conductivity device region. A connecting gate conductor is formed on the first portion and the second portion of the high-k gate dielectric layer. The connecting gate conductor extends from the first conductivity device region over the isolation region to the second conductivity device region. One of the first conductivity device region and the second conductivity device region may then be exposed to an oxygen containing atmosphere. Exposure with the oxygen containing atmosphere modifies a threshold voltage of the semiconductor device that is exposed.

Abstract(Chinese):

一种用于形成电气装置的方法，包括在半导体衬底上形成高k栅介质层，该半导体衬底被图案化以将存在于第一导电器件区域上的高k栅介质层的第一部分与第二部分分离存在于第二导电装置区域上的高k栅介质层。连接栅极导体形成在高k栅介质层的第一部分和第二部分上。连接栅极导体从隔离区域上的第一导电器件区域延伸到第二导电器件区域。然后可以将第一导电器件区域和第二导电器件区域中的一个暴露于含氧气氛中。用含氧气氛曝光改变暴露的半导体器件的阈值电压。

Public/Granted literature

US20130316503A1 STRUCTURE AND METHOD TO MODULATE THRESHOLD VOLTAGE FOR HIGH-K METAL GATE FIELD EFFECT TRANSISTORS (FETs) Public/Granted day:2013-11-28

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS