Invention Grant
- Patent Title: Non-systematic coded error correction
- Patent Title (中): 非系统编码纠错
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Application No.: US14156988Application Date: 2014-01-16
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Publication No.: US09229802B2Publication Date: 2016-01-05
- Inventor: William H. Radke , Shuba Swaminathan , Brady L. Keays
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G06F11/10
- IPC: G06F11/10

Abstract:
Methods are described that facilitate the detection and correction of data in memory systems or devices by encoding the data bits of a memory row or block in a non-systematic ECC code. This allows memory embodiments of the present invention to utilize reduced complexity error detection and correction hardware and/or routines to efficiently detect and correct corrupted user data in a segment of memory, such as a sector, word line row, or erase block. User data is not stored in a plaintext format in the memory array, allowing for an increased level of data security. The ECC code is distributed throughout the stored data in the memory segment, increasing the robustness of the ECC code and its resistance to damage or data corruption.
Public/Granted literature
- US20140136926A1 NON-SYSTEMATIC CODED ERROR CORRECTION Public/Granted day:2014-05-15
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