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公开(公告)号:US20210258022A1
公开(公告)日:2021-08-19
申请号:US17306698
申请日:2021-05-03
摘要: The present disclosure includes apparatuses and methods related to stopping criteria for layered iterative error correction. A number of methods can include receiving a codeword with an error correction circuit, iteratively error correcting the codeword with the error correction circuit including parity checking the codeword on a layer-by-layer basis and updating the codeword after each layer. Methods can include stopping the iterative error correction in response to a parity check being correct for a particular layer.
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公开(公告)号:US10762003B2
公开(公告)日:2020-09-01
申请号:US16118501
申请日:2018-08-31
发明人: William H. Radke , Victor Y. Tsai , James Cooke , Neal A. Galbo , Peter Feeley
摘要: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.
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公开(公告)号:US20190340066A1
公开(公告)日:2019-11-07
申请号:US16516611
申请日:2019-07-19
IPC分类号: G06F11/10 , G11C29/52 , G06F3/06 , G06F12/06 , G11C16/04 , G06F12/02 , G11C16/10 , G11C11/56
摘要: A memory device has a plurality of individually erasable blocks of memory cells and a controller configured to configure a first block of memory cells of the plurality of blocks of memory cells in a first configuration comprising one or more groups of overhead data memory cells, to configure a second block of memory cells of the plurality of blocks of memory cells in a second configuration comprising a group of user data memory cells and a group of overhead data memory cells, and to configure a third block of memory cells of the plurality of blocks of memory cells in a third configuration comprising only a group of user data memory cells. The group of overhead data memory cells of the second block of memory cells has a different storage capacity than at least one group of overhead data memory cells of the one or more groups of overhead data memory cells of the first block of memory cells.
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公开(公告)号:US10068655B2
公开(公告)日:2018-09-04
申请号:US15689955
申请日:2017-08-29
发明人: Zhenlei Shen , William H. Radke
摘要: Apparatuses and methods for inferring threshold voltage distributions associated with memory cells via interpolation are described herein. A number of embodiments include determining soft data for a group of memory cells each programmed to one of a number of data states, wherein the soft data comprises a number of different soft data values, determining a quantity of memory cells associated with each of the different soft data values, and inferring at least a portion of a threshold voltage distribution associated with the group of memory cells via an interpolation process using the determined quantities of memory cells associated with each of the different soft data values.
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公开(公告)号:US09811258B2
公开(公告)日:2017-11-07
申请号:US14557682
申请日:2014-12-02
CPC分类号: G06F3/0604 , G06F3/0659 , G06F3/0683 , G06F13/1642
摘要: The present disclosure includes methods for controlling host memory access with a memory device, systems, host controllers and memory devices. One embodiment for controlling host memory access with a memory device includes receiving at least one command from a host and controlling execution of the at least one command with the memory device.
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公开(公告)号:US20160203048A1
公开(公告)日:2016-07-14
申请号:US15059367
申请日:2016-03-03
发明人: Zhenlei Shen , William H. Radke , Peter Feeley
CPC分类号: G06F11/1068 , G06F11/1004 , G06F11/1048 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C16/26 , G11C16/3418 , G11C29/04 , G11C29/52
摘要: Methods for memory cell coupling compensation and apparatuses configured to perform the same are described. One or more methods for memory cell coupling compensation includes determining a state of a memory cell using a voltage that is changed in accordance with a first memory cell coupling compensation voltage, performing an error check on the state of the memory cell, and determining the state of the memory cell using a voltage that is changed in accordance with a second memory cell coupling compensation voltage in response to the error check failing.
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公开(公告)号:US09349441B2
公开(公告)日:2016-05-24
申请号:US14599786
申请日:2015-01-19
发明人: William H. Radke
CPC分类号: G11C11/5628 , G06F11/1008 , G11C11/5621 , G11C11/5642 , G11C16/04 , G11C16/0483 , G11C16/10 , G11C29/00 , G11C2211/5641
摘要: Methods, devices, modules, and systems for programming memory cells are disclosed. One method embodiment includes storing charges corresponding to a data state that represents an integer number of bits in a set of memory cells. The method also includes storing a charge in a cell of the set, where the charge corresponds to a programmed state, where the programmed state represents a fractional number of bits, and where the programmed state denotes a digit of the data state as expressed by a number in base N, where N is equal to 2B, rounded up to an integer, and where B is equal to the fractional number of bits represented by the programmed state.
摘要翻译: 公开了用于编程存储器单元的方法,装置,模块和系统。 一个方法实施例包括存储与在一组存储器单元中表示整数位的数据状态相对应的电荷。 该方法还包括将电荷存储在组的单元中,其中电荷对应于编程状态,其中编程状态表示分数位数,并且其中编程状态表示数据状态的数字,如 基数N中的数,其中N等于2B,向上舍入为整数,并且其中B等于由编程状态表示的分数位数。
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公开(公告)号:US09269450B2
公开(公告)日:2016-02-23
申请号:US14327913
申请日:2014-07-10
发明人: William H. Radke , Zhenlei Shen , Peter Feeley
CPC分类号: G11C16/28 , G11C11/5642 , G11C16/0483 , G11C16/26
摘要: The present disclosure includes methods, devices, and systems for adjusting sensing voltages in devices. One or more embodiments include memory cells, and a controller configured to perform a sense operation on the memory cells using a sensing voltage to determine a quantity of the memory cells having a threshold voltage (Vt) greater than the sensing voltage and adjust a sensing voltage used to determine a state of the memory cells based, at least partially, on the determined quantity of memory cells.
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公开(公告)号:US09177651B2
公开(公告)日:2015-11-03
申请号:US14108822
申请日:2013-12-17
CPC分类号: G11C16/10 , G11C16/0483 , G11C16/3418 , G11C16/3427 , G11C16/3454
摘要: Methods of programming a memory and memories are disclosed. In at least one embodiment, a memory is programmed by determining a pretarget threshold voltage for a selected cell, wherein the pretarget threshold voltage is determined using pretarget threshold voltage values for at least one neighbor cell of the selected cell.
摘要翻译: 公开了对存储器和存储器进行编程的方法。 在至少一个实施例中,通过确定所选择的单元的预定阈值电压来对存储器进行编程,其中使用所选单元的至少一个相邻单元的预定阈值电压值来确定预定阈值电压。
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公开(公告)号:US09171633B2
公开(公告)日:2015-10-27
申请号:US14570358
申请日:2014-12-15
发明人: Zhenlei Shen , William H. Radke
CPC分类号: G11C16/26 , G11C7/06 , G11C7/08 , G11C7/1006 , G11C11/56 , G11C11/5642 , G11C13/004 , G11C29/026 , G11C2013/0054 , G11C2013/0057 , G11C2207/2254 , G11C2211/5634
摘要: Memory devices and methods for operating a memory include filtering a histogram of sensed data of the memory, and adjusting a parameter used to sense the memory using the filtered histogram. Filtering can be accomplished by averaging or summing, and may include weighting the sums or averages.
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