-
公开(公告)号：US09229802B2
公开(公告)日：2016-01-05
申请号：US14156988
申请日：2014-01-16
Applicant: MICRON TECHNOLOGY, INC.
Inventor： William H. Radke , Shuba Swaminathan , Brady L. Keays
IPC: G06F11/10
CPC classification number: G06F11/10 , G06F11/1068
Abstract: Methods are described that facilitate the detection and correction of data in memory systems or devices by encoding the data bits of a memory row or block in a non-systematic ECC code. This allows memory embodiments of the present invention to utilize reduced complexity error detection and correction hardware and/or routines to efficiently detect and correct corrupted user data in a segment of memory, such as a sector, word line row, or erase block. User data is not stored in a plaintext format in the memory array, allowing for an increased level of data security. The ECC code is distributed throughout the stored data in the memory segment, increasing the robustness of the ECC code and its resistance to damage or data corruption.
Abstract translation: 描述了通过对非系统ECC代码中的存储器行或块的数据位进行编码来促进存储器系统或设备中的数据的检测和校正的方法。 这允许本发明的存储器实施例利用降低复杂性的错误检测和校正硬件和/或例程来有效地检测和校正存储器的段（例如扇区，字线行或擦除块）中的损坏的用户数据。 用户数据不以存储器阵列中的明文格式存储，从而可以提高数据安全级别。 ECC代码分布在存储器段中的所有存储的数据中，增加ECC代码的鲁棒性及其对损坏或数据损坏的抵抗力。
-
公开(公告)号：US20130332798A1
公开(公告)日：2013-12-12
申请号：US13964682
申请日：2013-08-12
Applicant: Micron Technology, Inc.
Inventor： Brady L. Keays , Shuba Swaminathan , William H. Radke
IPC: G06F11/10
CPC classification number: G06F11/10 , G06F11/1048 , H03M13/132 , H03M13/1515
Abstract: Methods of correcting data in a memory, and memories adapted to correct data, include prioritizing error correction of the read data in response to locations and likely states of known bad or questionable data positions of a segment of a memory array selected for reading.
Abstract translation: 校正存储器中的数据以及适于校正数据的存储器的方法包括响应于选择用于读取的存储器阵列的段的已知不良或可疑数据位置的位置和可能状态来优先考虑读取数据的错误校正。
-
公开(公告)号：US20140136926A1
公开(公告)日：2014-05-15
申请号：US14156988
申请日：2014-01-16
Applicant: MICRON TECHNOLOGY, INC.
Inventor： William H. Radke , Shuba Swaminathan , Brady L. Keays
IPC: G06F11/10
CPC classification number: G06F11/10 , G06F11/1068
Abstract: Methods are described that facilitate the detection and correction of data in memory systems or devices by encoding the data bits of a memory row or block in a non-systematic ECC code. This allows memory embodiments of the present invention to utilize reduced complexity error detection and correction hardware and/or routines to efficiently detect and correct corrupted user data in a segment of memory, such as a sector, word line row, or erase block. User data is not stored in a plaintext format in the memory array, allowing for an increased level of data security. The ECC code is distributed throughout the stored data in the memory segment, increasing the robustness of the ECC code and its resistance to damage or data corruption.
Abstract translation: 描述了通过对非系统ECC代码中的存储器行或块的数据位进行编码来促进存储器系统或设备中的数据的检测和校正的方法。 这允许本发明的存储器实施例利用降低复杂性的错误检测和校正硬件和/或例程来有效地检测和校正存储器的段（例如扇区，字线行或擦除块）中的损坏的用户数据。 用户数据不以存储器阵列中的明文格式存储，从而可以提高数据安全级别。 ECC代码分布在存储器段中的所有存储的数据中，增加ECC代码的鲁棒性及其对损坏或数据损坏的抵抗力。
-
Patent Agency Ranking
公开(公告)号：US08954818B2
公开(公告)日：2015-02-10
申请号：US14173256
申请日：2014-02-05
Applicant: Micron Technology, Inc.
Inventor： William H. Radke , Shuba Swaminathan , Brady L. Keays
CPC classification number: H03M13/096 , G06F11/1008
Abstract: An embodiment of a method of operating a memory device includes reading data from a memory array into a data buffer, checking the data using a first checker, checking the data using a second checker, and when an error is detected by the first checker and the error is not detected by the second checker returning the data to the memory array from the data buffer.
Abstract translation: 操作存储器件的方法的实施例包括将数据从存储器阵列读入数据缓冲器，使用第一校验器检查数据，使用第二校验器检查数据，以及当第一校验器检测到错误时， 第二个检查器从数据缓冲区将数据返回到存储器阵列时未检测到错误。
-
公开(公告)号：US08918584B2
公开(公告)日：2014-12-23
申请号：US14151095
申请日：2014-01-09
Applicant: Micron Technology, Inc.
Inventor： Shuba Swaminathan
CPC classification number: G11C16/107 , G06F12/0246 , G11C16/16 , G11C16/3418 , G11C16/3427 , G11C16/3431
Abstract: A method and apparatus for refreshing data in a flash memory device is disclosed. A counter is maintained for each memory block. When a memory block is erased, the counter for that erase block is set to a predetermined value while the remaining counters for other erase blocks are changed. When a memory block counter reaches a predetermined threshold value, the associated memory block is refreshed.
Abstract translation: 公开了一种用于刷新闪存设备中的数据的方法和装置。 为每个内存块维护一个计数器。 当存储块被擦除时，该擦除块的计数器被设置为预定值，而其它擦除块的剩余计数器被改变。 当存储器块计数器达到预定阈值时，相关联的存储器块被刷新。
-
公开(公告)号：US08782493B2
公开(公告)日：2014-07-15
申请号：US13964682
申请日：2013-08-12
Applicant: Micron Technology, Inc.
Inventor： Brady L. Keays , Shuba Swaminathan , William H. Radke
IPC: G11C29/00
CPC classification number: G06F11/10 , G06F11/1048 , H03M13/132 , H03M13/1515
Abstract: Methods of correcting data in a memory, and memories adapted to correct data, include prioritizing error correction of the read data in response to locations and likely states of known bad or questionable data positions of a segment of a memory array selected for reading.
Abstract translation: 校正存储器中的数据以及适于校正数据的存储器的方法包括响应于选择用于读取的存储器阵列的段的已知不良或可疑数据位置的位置和可能状态来优先考虑读取数据的错误校正。
-
公开(公告)号：US20140189475A1
公开(公告)日：2014-07-03
申请号：US14173256
申请日：2014-02-05
Applicant: MICRON TECHNOLOGY, INC.
Inventor： William H. Radke , Shuba Swaminathan , Brady L. Keays
IPC: H03M13/09
CPC classification number: H03M13/096 , G06F11/1008
Abstract: An embodiment of a method of operating a memory device includes reading data from a memory array into a data buffer, checking the data using a first checker, checking the data using a second checker, and when an error is detected by the first checker and the error is not detected by the second checker returning the data to the memory array from the data buffer.
Abstract translation: 操作存储器件的方法的实施例包括将数据从存储器阵列读入数据缓冲器，使用第一校验器检查数据，使用第二校验器检查数据，以及当第一校验器检测到错误时， 第二个检查器从数据缓冲区将数据返回到存储器阵列时未检测到错误。
-
公开(公告)号：US20140122788A1
公开(公告)日：2014-05-01
申请号：US14151095
申请日：2014-01-09
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shuba Swaminathan
CPC classification number: G11C16/107 , G06F12/0246 , G11C16/16 , G11C16/3418 , G11C16/3427 , G11C16/3431
Abstract: A method and apparatus for refreshing data in a flash memory device is disclosed. A counter is maintained for each memory block. When a memory block is erased, the counter for that erase block is set to a predetermined value while the remaining counters for other erase blocks are changed. When a memory block counter reaches a predetermined threshold value, the associated memory block is refreshed.
Abstract translation: 公开了一种用于刷新闪存设备中的数据的方法和装置。 为每个内存块维护一个计数器。 当存储块被擦除时，该擦除块的计数器被设置为预定值，而其它擦除块的剩余计数器被改变。 当存储器块计数器达到预定阈值时，相关联的存储器块被刷新。
-
-
-
-
-
-
-
Search Results
8
records
(took 0.015 seconds)
