A substrate of SOI type is covered by an etching mask defining three distinct semiconductor patterns. A lateral spacer is formed around the three patterns and performs the connection between two adjacent patterns. The buried insulating layer is eliminated so as to define a cavity which suspends a part of a first pattern. The first etching mask is eliminated. A gate dielectric is formed on two opposite main surfaces of the first pattern. The resist is deposited in the cavity and on the first pattern and is then exposed to form two patterns defining the bottom and top gates. An electrically conducting material is deposited in the cavity and on the first pattern so as to form the bottom gate and the top gate on each side of the first semiconductor material pattern.