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    FMCW HETERODYNE-DETECTION LIDAR IMAGER SYSTEM WITH IMPROVED DISTANCE RESOLUTION
    1.
    发明申请
    FMCW HETERODYNE-DETECTION LIDAR IMAGER SYSTEM WITH IMPROVED DISTANCE RESOLUTION 有权

    公开(公告)号：US20230097296A1

    公开(公告)日：2023-03-30

    申请号：US17933284

    申请日：2022-09-19

    申请人： Commissariat à l'Energie Atomique et aux Energies Alternatives

    发明人： Laurent FREY ,  Anis DAAMI

    IPC分类号： G01S17/89 ,  H04N5/225 ,  G01S7/481

    摘要： The invention relates to a FMCW lidar imager system with improved distance resolution. The imager system 1 comprises a reflector 42 configured to reflect, in the direction of the scene 2, a portion Sor,nc of the backscattered object signal Sor, which portion has not been collected by the collecting optical element 41. Thus, the collected portion Sor,c of the backscattered object signal Sor is formed from first light beams Sor,c(1) that have not been reflected by the reflector 42 and from light beams Sor,c(2) that have been reflected by the reflector 42. The heterodyne signal Sh therefore has a principal component Sh(1) associated with the light beams Sor,c(1), and a secondary component Sh(2) associated with the light beams Sor,c(2). The processing unit 60 is configured to determine the distance zsc of the scene 2 on the basis of a beat frequency fb(2) of the secondary component Sh(2) of the heterodyne signal Sh.

    METHOD FOR EXECUTING A FUNCTION, SECURED BY TEMPORAL DESYNCHRONIZATION
    6.
    发明申请
    METHOD FOR EXECUTING A FUNCTION, SECURED BY TEMPORAL DESYNCHRONIZATION 有权

    公开(公告)号：US20220360424A1

    公开(公告)日：2022-11-10

    申请号：US17654477

    申请日：2022-03-11

    申请人： Commissariat à l'Energie Atomique et aux Energies Alternatives

    发明人： Gaëtan LEPLUS ,  Olivier SAVRY

    IPC分类号： H04L9/00

    摘要： A method for executing a function, secured by temporal desynchronization, includes when a first legitimate instruction is loaded, noting the opcode of this first legitimate instruction, then constructing a dummy instruction on the basis of this noted opcode, the dummy instruction thus constructed being identical to the first legitimate instruction except that its operands are different, then incorporating the dummy instruction thus constructed into a sequence of dummy instructions used to delay the time at which a second legitimate instruction is executed.

    Memory module adapted to implementing computing functions
    8.
    发明授权
    Memory module adapted to implementing computing functions 有权

    公开(公告)号：US11482264B2

    公开(公告)日：2022-10-25

    申请号：US17645527

    申请日：2021-12-22

    申请人： Commissariat à l'Energie Atomique et aux Energies Alternatives

    发明人： Maha Kooli ,  Roman Gauchi ,  Pascal Vivet

    IPC分类号： G11C7/10 ,  G06F13/16

    摘要： The present description concerns a memory device (200) comprising: a memory circuit (201) implementing operations and performing elementary operations including a reading, a writing, or a computing operation; a control circuit (205) receiving instructions from a processor (231), and breaking down each received instruction into a plurality of elementary operations to generate an elementary operation request flow; a circuit (203) of direct data transfer from or to said memory circuit (201), the transfer circuit (203) receiving instructions from the processor (231), breaking down each received instruction into a plurality of elementary operations to be performed in said memory circuit to generate an elementary operation request flow; an internal data exchange link (204) directly coupling said memory circuit (201) to the direct transfer circuit (203); and an arbitration circuit (309).