Invention Grant
US09240384B2 Semiconductor device with solder bump formed on high topography plated Cu pads
有权
具有焊料凸块的半导体器件形成在高地形电镀铜焊盘上
- Patent Title: Semiconductor device with solder bump formed on high topography plated Cu pads
- Patent Title (中): 具有焊料凸块的半导体器件形成在高地形电镀铜焊盘上
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Application No.: US13621804Application Date: 2012-09-17
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Publication No.: US09240384B2Publication Date: 2016-01-19
- Inventor: Yaojian Lin , Qing Zhang , Haijing Cao
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/00

Abstract:
A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the substrate and first conductive layer. A second conductive layer is formed over the first conductive layer and first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. The second insulating layer has a sidewall between a surface of the second insulating material and surface of the second conductive layer. A protective layer is formed over the second insulating layer and surface of the second conductive layer. The protective layer follows a contour of the surface and sidewall of the second insulating layer and second conductive layer. A bump is formed over the surface of the second conductive layer and a portion of the protective layer adjacent to the second insulating layer. The protective layer protects the second insulating layer.
Public/Granted literature
- US20130015575A1 Semiconductor Device with Solder Bump Formed on High Topography Plated Cu Pads Public/Granted day:2013-01-17
Information query
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