公开(公告)号：US10211183B2

公开(公告)日：2019-02-19

申请号：US15069719

申请日：2016-03-14

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC: H01L29/00 ,  H01L25/065 ,  H01L27/01 ,  H01L25/00 ,  H01L23/552 ,  H01L27/07

Abstract: A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.

公开(公告)号：US20160197059A1

公开(公告)日：2016-07-07

申请号：US15069719

申请日：2016-03-14

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L23/552 ,  H01L25/50 ,  H01L27/016 ,  H01L27/0711 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2225/06531 ,  H01L2225/06537 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.

Abstract translation: 半导体器件通过提供衬底制成，在衬底上形成第一绝缘层，在第一绝缘层上形成第一导电层，在第一导电层上形成第二绝缘层，并在第二绝缘层上形成第二导电层 绝缘层。 第二绝缘层，第一导电层和第二导电层的一部分形成集成的无源器件（IPD）。 IPD可以是电感，电容或电阻。 多个导电柱形成在第二导电层上。 一个导电柱从半导体器件中去除热量。 在IPD上并围绕多个导电柱形成第三绝缘层。 在IPD，第三绝缘层和导电柱上形成屏蔽层。 屏蔽层电连接到导电柱以屏蔽IPD免受电磁干扰。

公开(公告)号：US20130175668A1

公开(公告)日：2013-07-11

申请号：US13782939

申请日：2013-03-01

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

IPC: H01L49/02

CPC classification number: H01L23/5389 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L24/48 ,  H01L27/1266 ,  H01L28/00 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has integrated passive circuit elements. A first substrate is formed on a backside of the semiconductor device. The passive circuit element is formed over the insulating layer. The passive circuit element can be an inductor, capacitor, or resistor. A passivation layer is formed over the passive circuit element. A carrier is attached to the passivation layer. The first substrate is removed. A non-silicon substrate is formed over the insulating layer on the backside of the semiconductor device. The non-silicon substrate is made with glass, molding compound, epoxy, polymer, or polymer composite. An adhesive layer is formed between the non-silicon substrate and insulating layer. A via is formed between the insulating layer and first passivation layer. The carrier is removed. An under bump metallization is formed over the passivation layer in electrical contact with the passive circuit element. A solder bump is formed on the under bump metallization.

公开(公告)号：US09240384B2

公开(公告)日：2016-01-19

申请号：US13621804

申请日：2012-09-17

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Qing Zhang ,  Haijing Cao

IPC: H01L21/44 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

CPC classification number: H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0231 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05647 ,  H01L2224/11009 ,  H01L2224/11019 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2224/05552

Abstract: A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the substrate and first conductive layer. A second conductive layer is formed over the first conductive layer and first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. The second insulating layer has a sidewall between a surface of the second insulating material and surface of the second conductive layer. A protective layer is formed over the second insulating layer and surface of the second conductive layer. The protective layer follows a contour of the surface and sidewall of the second insulating layer and second conductive layer. A bump is formed over the surface of the second conductive layer and a portion of the protective layer adjacent to the second insulating layer. The protective layer protects the second insulating layer.

Abstract translation: 半导体器件具有形成在衬底上的第一导电层。 第一绝缘层形成在衬底和第一导电层上。 在第一导电层和第一绝缘层上形成第二导电层。 在第一绝缘层和第二导电层上形成第二绝缘层。 第二绝缘层在第二绝缘材料的表面和第二导电层的表面之间具有侧壁。 在第二绝缘层和第二导电层的表面上形成保护层。 保护层遵循第二绝缘层和第二导电层的表面和侧壁的轮廓。 在第二导电层的表面上形成凸块，并且与第二绝缘层相邻的部分形成保护层。 保护层保护第二绝缘层。

公开(公告)号：US09337141B2

公开(公告)日：2016-05-10

申请号：US13622280

申请日：2012-09-18

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Haijing Cao ,  Qing Zhang

IPC: H01L21/44 ,  H01L21/4763 ,  H01L21/20 ,  H01L23/522 ,  H01L23/64 ,  H01L23/00 ,  H01L49/02

CPC classification number: H01L23/5227 ,  H01L23/645 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L28/10 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/056 ,  H01L2224/451 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A semiconductor device has a substrate with an inductor formed on its surface. First and second contact pads are formed on the substrate. A passivation layer is formed over the substrate and first and second contact pads. A protective layer is formed over the passivation layer. The protective layer is removed over the first contact pad, but not from the second contact pad. A conductive layer is formed over the first contact pad. The conductive layer is coiled on the surface of the substrate to produce inductive properties. The formation of the conductive layer involves use of a wet etchant. The second contact pad is protected from the wet etchant by the protective layer. The protective layer is removed from the second contact pad after forming the conductive layer over the first contact pad. An external connection is formed on the second contact pad.

Abstract translation: 半导体器件具有在其表面上形成有电感器的基板。 第一和第二接触垫形成在基板上。 在衬底和第一和第二接触焊盘之上形成钝化层。 在钝化层上形成保护层。 保护层在第一接触垫上移除，但不从第二接触垫移除。 导电层形成在第一接触焊盘上。 导电层被卷绕在基板的表面上以产生电感性质。 导电层的形成涉及使用湿蚀刻剂。 第二接触垫被保护层从湿蚀刻剂保护。 在第一接触垫上形成导电层之后，从第二接触焊盘去除保护层。 在第二接触垫上形成外部连接。

公开(公告)号：US20130015575A1

公开(公告)日：2013-01-17

申请号：US13621804

申请日：2012-09-17

Applicant: STATS CHIPPAC, LTD.

Inventor： Yaojian Lin ,  Qing Zhang ,  Haijing Cao

IPC: H01L21/60 ,  H01L23/48

CPC classification number: H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0231 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05647 ,  H01L2224/11009 ,  H01L2224/11019 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2224/05552

Abstract: A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the substrate and first conductive layer. A second conductive layer is formed over the first conductive layer and first insulating layer. A second insulating layer is formed over the first insulating layer and second conductive layer. The second insulating layer has a sidewall between a surface of the second insulating material and surface of the second conductive layer. A protective layer is formed over the second insulating layer and surface of the second conductive layer. The protective layer follows a contour of the surface and sidewall of the second insulating layer and second conductive layer. A bump is formed over the surface of the second conductive layer and a portion of the protective layer adjacent to the second insulating layer. The protective layer protects the second insulating layer.

Abstract translation: 半导体器件具有形成在衬底上的第一导电层。 第一绝缘层形成在衬底和第一导电层上。 在第一导电层和第一绝缘层上形成第二导电层。 在第一绝缘层和第二导电层上形成第二绝缘层。 第二绝缘层在第二绝缘材料的表面和第二导电层的表面之间具有侧壁。 在第二绝缘层和第二导电层的表面上形成保护层。 保护层遵循第二绝缘层和第二导电层的表面和侧壁的轮廓。 在第二导电层的表面上形成凸块，并且与第二绝缘层相邻的部分形成保护层。 保护层保护第二绝缘层。

公开(公告)号：US09449925B2

公开(公告)日：2016-09-20

申请号：US13782939

申请日：2013-03-01

Applicant: STATS ChipPAC, Ltd.

Inventor： Yaojian Lin ,  Haijing Cao ,  Qing Zhang ,  Kang Chen ,  Jianmin Fang

IPC: H01L29/00 ,  H01L23/538 ,  H01L23/00 ,  H01L27/12 ,  H01L49/02 ,  H01L21/683 ,  H01L23/498 ,  H01L23/50

CPC classification number: H01L23/5389 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L24/48 ,  H01L27/1266 ,  H01L28/00 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L2221/68345 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has integrated passive circuit elements. A first substrate is formed on a backside of the semiconductor device. The passive circuit element is formed over the insulating layer. The passive circuit element can be an inductor, capacitor, or resistor. A passivation layer is formed over the passive circuit element. A carrier is attached to the passivation layer. The first substrate is removed. A non-silicon substrate is formed over the insulating layer on the backside of the semiconductor device. The non-silicon substrate is made with glass, molding compound, epoxy, polymer, or polymer composite. An adhesive layer is formed between the non-silicon substrate and insulating layer. A via is formed between the insulating layer and first passivation layer. The carrier is removed. An under bump metallization is formed over the passivation layer in electrical contact with the passive circuit element. A solder bump is formed on the under bump metallization.

Abstract translation: 半导体器件集成无源电路元件。 第一衬底形成在半导体器件的背面。 无源电路元件形成在绝缘层上。 无源电路元件可以是电感器，电容器或电阻器。 钝化层形成在无源电路元件上。 载体附着在钝化层上。 去除第一衬底。 在半导体器件的背面上的绝缘层上形成非硅衬底。 非硅衬底由玻璃，模塑料，环氧树脂，聚合物或聚合物复合材料制成。 在非硅衬底和绝缘层之间形成粘合剂层。 在绝缘层和第一钝化层之间形成通孔。 载体被移除。 在与无源电路元件电接触的钝化层之上形成凸起下金属化。 在凸块下方形成焊锡凸块。

公开(公告)号：US20130015555A1

公开(公告)日：2013-01-17

申请号：US13622280

申请日：2012-09-18

Applicant: STATS chipPAC, lTD.

Inventor： Yaojian Lin ,  Haijing Cao ,  Qing Zhang

IPC: H01L29/02

CPC classification number: H01L23/5227 ,  H01L23/645 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L28/10 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/056 ,  H01L2224/451 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A semiconductor device has a substrate with an inductor formed on its surface. First and second contact pads are formed on the substrate. A passivation layer is formed over the substrate and first and second contact pads. A protective layer is formed over the passivation layer. The protective layer is removed over the first contact pad, but not from the second contact pad. A conductive layer is formed over the first contact pad. The conductive layer is coiled on the surface of the substrate to produce inductive properties. The formation of the conductive layer involves use of a wet etchant. The second contact pad is protected from the wet etchant by the protective layer. The protective layer is removed from the second contact pad after forming the conductive layer over the first contact pad. An external connection is formed on the second contact pad.

Abstract translation: 半导体器件具有在其表面上形成有电感器的基板。 第一和第二接触垫形成在基板上。 在衬底和第一和第二接触焊盘之上形成钝化层。 在钝化层上形成保护层。 保护层在第一接触垫上移除，但不从第二接触垫移除。 导电层形成在第一接触焊盘上。 导电层被卷绕在基板的表面上以产生电感性质。 导电层的形成涉及使用湿蚀刻剂。 第二接触垫被保护层从湿蚀刻剂保护。 在第一接触垫上形成导电层之后，从第二接触焊盘去除保护层。 在第二接触垫上形成外部连接。