Invention Grant
US09244487B2 Integrated translational land-grid array sockets and loading mechanisms for semiconductive devices
有权
用于半导体器件的集成平移式格栅阵列插座和加载机构
- Patent Title: Integrated translational land-grid array sockets and loading mechanisms for semiconductive devices
- Patent Title (中): 用于半导体器件的集成平移式格栅阵列插座和加载机构
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Application No.: US14090493Application Date: 2013-11-26
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Publication No.: US09244487B2Publication Date: 2016-01-26
- Inventor: Russell S. Aoki , Anthony P. Valpiani , Barry T. Dale , Chia-Pin Chiu
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: International IP Law Group, P.L.L.C.
- Main IPC: H01R4/50
- IPC: H01R4/50 ; G06F1/16 ; H01R13/193 ; H05K7/10
Abstract:
A land-grid array die package socket is configured for low- or zero insertion-force assembly with a land-grid array die package. For zero insertion-force assembly, a motion plate applies a force on a land-grid array contact that causes a contact tip to move into protective cover while the die package is inserted into the socket. After zero insertion-force assembly, the motion plate applies a force on the land-grid array contact that causes the contact tip to deflect in a positive-Z direction until a useful contact is made at the contact tip with a land-grid array pad.
Public/Granted literature
- US20140082915A1 INTEGRATED TRANSLATIONAL LAND-GRID ARRAY SOCKETS AND LOADING MECHANISMS FOR SEMICONDUCTIVE DEVICES Public/Granted day:2014-03-27
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