Invention Grant
US09257519B2 Semiconductor device including graded gate stack, related method and design structure
有权
半导体器件包括分级栅极堆栈，相关方法和设计结构
- Patent Title: Semiconductor device including graded gate stack, related method and design structure
- Patent Title (中): 半导体器件包括分级栅极堆栈，相关方法和设计结构
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Application No.: US14081417Application Date: 2013-11-15
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Publication No.: US09257519B2Publication Date: 2016-02-09
- Inventor: Michael P. Chudzik , Min Dai , Jinping Liu , Joseph F. Shepard, Jr. , Keith K. H. Wong
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GlobalFoundries, Inc.
- Current Assignee: GlobalFoundries, Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Anthony J. Canale
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/02 ; H01L21/336 ; H01L29/49 ; H01L29/47 ; H01L21/28 ; H01L29/51
Abstract:
A semiconductor device is disclosed. The semiconductor device includes a substrate; and a gate structure disposed directly on the substrate, the gate structure including: a graded region with a varied material concentration profile; and a metal layer disposed on the graded region.
Public/Granted literature
- US20140070334A1 SEMICONDUCTOR DEVICE INCLUDING GRADED GATE STACK, RELATED METHOD AND DESIGN STRUCTURE Public/Granted day:2014-03-13
Information query
IPC分类:
