A multi-level power converter system includes a multi-level power converter configured to synthesize at least three direct current (DC) voltages into an alternating current (AC) output voltage, and includes a plurality of transistors. A controller generates pulse-width modulation (PWM) signals used to control a state of the plurality of transistors of the multi-level converter by comparing first and second carrier signals to a reference signals, wherein a period of the first and second carrier signals is randomly varied from a nominal period.