Invention Grant
- Patent Title: Methods for fabricating integrated circuits using directed self-assembly
- Patent Title (中): 使用定向自组装制造集成电路的方法
-
Application No.: US14341985Application Date: 2014-07-28
-
Publication No.: US09275896B2Publication Date: 2016-03-01
- Inventor: Deniz Elizabeth Civay , Ji Xu , Gerard Schmid , Guillaume Bouche , Richard A. Farrell
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L21/033
- IPC: H01L21/033 ; H01L21/768 ; H01L21/02 ; H01L21/311 ; H01L21/027

Abstract:
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a graphoepitaxy DSA directing confinement well using a sidewall of an etch layer that overlies a semiconductor substrate. The graphoepitaxy DSA directing confinement well is filled with a block copolymer. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The etchable phase is etched while leaving the etch resistant phase substantially in place to define an etch mask with a nanopattern. The nanopattern is transferred to the etch layer.
Public/Granted literature
- US20160027685A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASSEMBLY Public/Granted day:2016-01-28
Information query
IPC分类: