Invention Grant
- Patent Title: Resonant clocking for three-dimensional stacked devices
- Patent Title (中): 谐振时钟三维堆叠器件
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Application No.: US13730331Application Date: 2012-12-28
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Publication No.: US09287196B2Publication Date: 2016-03-15
- Inventor: Ruchir Saraswat , Uwe Zillmann , Andre Schaefer , Tor Lund-Larsen
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L27/08
- IPC: H01L27/08 ; H01L23/48 ; H01L23/522 ; H01L25/065 ; H01L27/06 ; H01L23/64

Abstract:
Resonant clocking for three-dimensional stacked devices. An embodiment of an apparatus includes a stack including integrated circuit dies; and through silicon vias through at least one of the dies, wherein at least a first through silicon via of the through silicon vias includes a capacitive structure or an inductive structure, the first through silicon via being formed in a first die of the plurality of dies. The apparatus includes a resonant circuit, the first through silicon via used as a first circuit element of the resonant circuit.
Public/Granted literature
- US20140183691A1 RESONANT CLOCKING FOR THREE-DIMENSIONAL STACKED DEVICES Public/Granted day:2014-07-03
Information query
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