发明授权
US09335347B2 Method and apparatus for massively parallel multi-wafer test 有权
用于大规模并行多晶片测试的方法和装置

Method and apparatus for massively parallel multi-wafer test
摘要:
Disclosed herein is a cost effective, efficient, massively parallel multi-wafer test cell. Additionally, this test cell can be used for both single-touchdown and multiple-touchdown applications. The invention uses a novel “split-cartridge” design, combined with a method for aligning wafers when they are separated from the probe card assembly, to create a cost effective, efficient multi-wafer test cell. A “probe-card stops” design may be used within the cartridge to simplify the overall cartridge design and operation.
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