Invention Grant
US09337108B2 Semiconductor device with metal gate and high-k dielectric layer, CMOS integrated circuit, and method for fabricating the same
有权
具有金属栅极和高k电介质层的半导体器件，CMOS集成电路及其制造方法
- Patent Title: Semiconductor device with metal gate and high-k dielectric layer, CMOS integrated circuit, and method for fabricating the same
- Patent Title (中): 具有金属栅极和高k电介质层的半导体器件，CMOS集成电路及其制造方法
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Application No.: US13339922Application Date: 2011-12-29
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Publication No.: US09337108B2Publication Date: 2016-05-10
- Inventor: Yun-Hyuck Ji , Beom-Yong Kim , Seung-Mi Lee
- Applicant: Yun-Hyuck Ji , Beom-Yong Kim , Seung-Mi Lee
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2011-0111825 20111031
- Main IPC: H01L29/49
- IPC: H01L29/49 ; H01L21/8238 ; H01L21/28 ; H01L21/02 ; H01L29/51
Abstract:
A semiconductor device includes a gate dielectric layer over a substrate, a metal layer over the gate dielectric layer, a capping layer over the metal layer, wherein the capping layer includes a plurality of dipole forming elements concentrated at the interface between the metal layer and the capping layer.
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