发明授权
- 专利标题: Semiconductor package and fabrication method thereof
- 专利标题(中): 半导体封装及其制造方法
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申请号: US14256496申请日: 2014-04-18
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公开(公告)号: US09343401B2公开(公告)日: 2016-05-17
- 发明人: Chi-Liang Shih , Hsin-Lung Chung , Te-Fang Chu , Sheng-Ming Yang , Hung-Cheng Chen , Chia-Yang Chen
- 申请人: Siliconware Precision Industries Co., Ltd.
- 申请人地址: TW Taichung
- 专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人: Siliconware Precision Industries Co., Ltd.
- 当前专利权人地址: TW Taichung
- 代理机构: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- 代理商 Peter F. Corless; Steven M. Jensen
- 优先权: TW103106214A 20140225
- 主分类号: H01L29/04
- IPC分类号: H01L29/04 ; H01L29/10 ; H01L31/00 ; H01L23/498 ; H01L23/31 ; H01L23/00
摘要:
A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
公开/授权文献
- US20150243574A1 SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF 公开/授权日:2015-08-27
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