An integrated circuit for an embedded flash memory device is provided. A semiconductor substrate includes a memory region and a logic region adjacent to the memory region. A logic device is arranged over the logic region and includes a metal gate separated from the semiconductor substrate by a material having a dielectric constant exceeding 3.9. A flash memory cell device is arranged over the memory region. The flash memory cell device includes a memory cell gate electrically insulated on opposing sides by corresponding dielectric regions. A silicide contact pad is arranged over a top surface of the memory cell gate. The top surface of the memory cell gate and a top surface of the silicide contact pad are recessed relative to a top surface of the metal gate and top surfaces of the dielectric regions. A method of manufacturing the integrated circuit is also provided.