Invention Grant
US09355909B2 Method of manufacturing an integrated circuit having field effect transistors including a peak in a body dopant concentration
有权
具有场效应晶体管的集成电路的制造方法,该场效应晶体管包括体内掺杂剂浓度的峰值
- Patent Title: Method of manufacturing an integrated circuit having field effect transistors including a peak in a body dopant concentration
- Patent Title (中): 具有场效应晶体管的集成电路的制造方法,该场效应晶体管包括体内掺杂剂浓度的峰值
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Application No.: US14148776Application Date: 2014-01-07
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Publication No.: US09355909B2Publication Date: 2016-05-31
- Inventor: Thorsten Meyer , Stefan Decker , Norbert Krischke , Christoph Kadow
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: H01L27/148
- IPC: H01L27/148 ; H01L29/768 ; H01L21/8234 ; H01L21/265 ; H01L21/266 ; H01L21/8238 ; H01L27/088 ; H01L29/10 ; H01L29/66 ; H01L29/78

Abstract:
An integrated circuit having field effect transistors and manufacturing method. One embodiment provides an integrated circuit including a first FET and a second FET. At least one of source, drain, gate of the first FET is electrically connected to the corresponding one of source, drain, gate of the second FET. At least one further of source, drain, gate of the first FET and the corresponding one further of source, drain, gate of the second FET are connected to a circuit element, respectively. A dopant concentration of a body along a channel of each of the first and second FETs has a peak at a peak location within the channel.
Public/Granted literature
- US20140120673A1 INTEGRATED CIRCUIT HAVING FIELD EFFECT TRANSISTORS AND MANUFACTURING METHOD Public/Granted day:2014-05-01
Information query
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