Invention Grant
US09367497B2 Reconfigurably designating master core for conditional output on sideband communication wires distinct from system bus
有权
可重构地指定与系统总线不同的边带通信线路上的条件输出的主核
- Patent Title: Reconfigurably designating master core for conditional output on sideband communication wires distinct from system bus
- Patent Title (中): 可重构地指定与系统总线不同的边带通信线路上的条件输出的主核
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Application No.: US14522931Application Date: 2014-10-24
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Publication No.: US09367497B2Publication Date: 2016-06-14
- Inventor: G. Glenn Henry , Stephan Gaskins
- Applicant: VIA TECHNOLOGIES, INC.
- Applicant Address: TW New Taipei
- Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee: VIA TECHNOLOGIES, INC.
- Current Assignee Address: TW New Taipei
- Agent E. Alan Davis; James W. Huffman; Eric W. Cernyar
- Main IPC: G06F13/36
- IPC: G06F13/36 ; G06F15/163 ; G06F1/32 ; G06F1/24 ; G06F9/30 ; G06F9/50 ; G06F9/445 ; G06F15/82 ; G06F11/36 ; G06F11/14

Abstract:
A method for dynamically reconfiguring one or more cores of a multi-core microprocessor comprising a plurality of cores and sideband communication wires, extrinsic to a system bus connected to a chipset, which facilitate non-system-bus inter-core communications. At least some of the cores are operable to be reconfigurably designated with or without master credentials for purposes of structuring sideband-based inter-core communications. The method includes determining an initial configuration of cores of the microprocessor, which configuration designates at least one core, but not all of the cores, as a master core, and reconfiguring the cores according to a modified configuration, which modified configuration removes a master designation from a core initially so designated, and assigns a master designation to a core not initially so designated. Each core is configured to conditionally drive a sideband communication wire to which it is connected based upon its designation, or lack thereof, as a master core.
Public/Granted literature
- US20150046680A1 DYNAMIC AND SELECTIVE CORE DISABLEMENT AND RECONFIGURATION IN A MULTI-CORE PROCESSOR Public/Granted day:2015-02-12
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