发明授权
- 专利标题: Semiconductor device including output circuit constituted of plural unit buffer circuits in which impedance thereof are adjustable
- 专利标题(中): 包括由其阻抗可调的多个单位缓冲电路构成的输出电路的半导体装置
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申请号: US14295213申请日: 2014-06-03
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公开(公告)号: US09368189B2公开(公告)日: 2016-06-14
- 发明人: Hideyuki Yokou , Koji Uemura , Manabu Ishimatsu
- 申请人: PS4 Luxco S.a.r.l.
- 申请人地址: LU Luxembourg
- 专利权人: PS4 LUXCO S.A.R.L.
- 当前专利权人: PS4 LUXCO S.A.R.L.
- 当前专利权人地址: LU Luxembourg
- 代理机构: Kunzler Law Group, PC
- 优先权: JP2011-223741 20111011
- 主分类号: H03K19/003
- IPC分类号: H03K19/003 ; G11C11/4076 ; H03K17/16 ; H03K19/00 ; G11C11/4093 ; G11C5/14 ; G11C29/02 ; H03K19/0185
摘要:
A semiconductor device includes an output circuit having a plurality of unit buffer circuits, an impedance of each unit buffer circuit of the plurality of unit buffer circuits being adjustable, a control circuit configured to selectively activate one or more unit buffer circuits of the plurality of unit buffer circuits, and an impedance adjustment unit configured to adjust the impedance of each of the unit buffer circuits of the plurality of unit buffer circuits. The impedance adjustment unit includes a first power line, a replica circuit, and a load current generation circuit. The replica circuit and the load current generation circuit are coupled in common to the first power line, the replica circuit has a replica impedance that is substantially equal to the impedance of the output circuit, and the load current generation circuit changes current flowing therethrough.
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