Invention Grant
US09373715B2 Semiconductor devices including vertical memory cells and methods of forming same
有权
包括垂直存储单元的半导体器件及其形成方法
- Patent Title: Semiconductor devices including vertical memory cells and methods of forming same
- Patent Title (中): 包括垂直存储单元的半导体器件及其形成方法
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Application No.: US14075480Application Date: 2013-11-08
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Publication No.: US09373715B2Publication Date: 2016-06-21
- Inventor: Wolfgang Mueller , Sanh D. Tang , Sourabh Dhir , Srinivas Pulugurtha
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L29/78
- IPC: H01L29/78 ; G11C11/40 ; H01L27/02 ; H01L27/105 ; H01L29/66 ; H01L27/108
Abstract:
A semiconductor device may include a memory array including vertical memory cells connected to a digit line, word lines, and a body connection line. A row or column of the memory array may include one or more pillars connected to the body connection line. A voltage may be applied to the body connection line through at least one pillar connected to the body connection line. Application of the voltage to the body connection line may reduce floating body effects. Methods of forming a connection between at least one pillar and a voltage supply are disclosed. Semiconductor devices including such connections are also disclosed.
Public/Granted literature
- US20150129955A1 SEMICONDUCTOR DEVICES INCLUDING VERTICAL MEMORY CELLS AND METHODS OF FORMING SAME Public/Granted day:2015-05-14
Information query
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