Invention Grant
US09378314B2 Analytical model for predicting current mismatch in metal oxide semiconductor arrays
有权
用于预测金属氧化物半导体阵列中的电流失配的分析模型
- Patent Title: Analytical model for predicting current mismatch in metal oxide semiconductor arrays
- Patent Title (中): 用于预测金属氧化物半导体阵列中的电流失配的分析模型
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Application No.: US14467327Application Date: 2014-08-25
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Publication No.: US09378314B2Publication Date: 2016-06-28
- Inventor: Amit Kundu , Jaw-Juinn Horng , Yung-Chow Peng , Shih-Cheng Yang , Chung-Kai Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Agent Steven E. Koffs
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L27/02

Abstract:
A system and method for designing integrated circuits and predicting current mismatch in a metal oxide semiconductor (MOS) array. A first subset of cells in the MOS array is selected and current measured for each of these cells. Standard deviation of current for each cell in the first subset of cells is determined with respect to current of a reference cell. Standard deviation of local variation can be determined using the determined standard deviation of current for one or more cells in the first subset. Standard deviations of variation induced by, for example, poly density gradient effects, in the x and/or y direction of the array can then be determined and current mismatch for any cell in the array determined therefrom.
Public/Granted literature
- US20140372959A1 ANALYTICAL MODEL FOR PREDICTING CURRENT MISMATCH IN METAL OXIDE SEMICONDUCTOR ARRAYS Public/Granted day:2014-12-18
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