发明授权
US09385009B2 Semiconductor device and method of forming stacked vias within interconnect structure for Fo-WLCSP
有权
用于Fo-WLCSP的互连结构内形成堆叠通孔的半导体器件和方法
- 专利标题: Semiconductor device and method of forming stacked vias within interconnect structure for Fo-WLCSP
- 专利标题(中): 用于Fo-WLCSP的互连结构内形成堆叠通孔的半导体器件和方法
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申请号: US13243558申请日: 2011-09-23
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公开(公告)号: US09385009B2公开(公告)日: 2016-07-05
- 发明人: Yaojian Lin , Rui Huang , Kang Cheng , Gu Yu
- 申请人: Yaojian Lin , Rui Huang , Kang Cheng , Gu Yu
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC Pte. Ltd.
- 当前专利权人: STATS ChipPAC Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 代理机构: Patent Law Group: Atkins and Associates, P.C.
- 代理商 Robert D. Atkins
- 主分类号: H01L29/41
- IPC分类号: H01L29/41 ; H01L21/56 ; H01L23/00 ; H01L25/10 ; H01L23/498 ; H01L21/48 ; H01L23/538 ; H01L23/31
摘要:
A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. A first insulating layer is formed over the encapsulant and semiconductor die. First vias are formed through the first insulating layer to expose contact pads of the semiconductor die. A first conductive layer is formed over the first insulating layer and into the first vias to electrically connect to the contact pads of the semiconductor die. A second insulating layer is formed over the first insulating layer and first conductive layer. Second vias are formed through the second insulating layer by laser direct ablation and aligned or offset with the first vias to expose the first conductive layer. A second conductive layer is formed over the second insulating layer and into the second vias. Conductive vias can be formed through the encapsulant.
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