Invention Grant
US09385127B2 Method and apparatus for suppressing metal-gate cross-diffusion in semiconductor technology
有权
用于抑制半导体技术中金属栅极交叉扩散的方法和装置
- Patent Title: Method and apparatus for suppressing metal-gate cross-diffusion in semiconductor technology
- Patent Title (中): 用于抑制半导体技术中金属栅极交叉扩散的方法和装置
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Application No.: US13973616Application Date: 2013-08-22
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Publication No.: US09385127B2Publication Date: 2016-07-05
- Inventor: Qi Lin , Hong-Tsz Pan , Yun Wu , Bang-Thu Nguyen
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Gerald Chan; Keith Taboada; Robert M. Brush
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L27/092 ; H01L21/8238
Abstract:
An inverter includes: a PMOS comprising: a p-type source region, a p-type drain region, a p-channel region between the p-type source region and the p-type drain region, and a PMOS metal gate region; a NMOS, comprising: an n-type source region, an n-type drain region, an n-channel region between the n-type source region and the n-type drain region, and a NMOS metal gate region; an insulating layer above the p-channel region and the n-channel region, wherein the PMOS metal gate region and the NMOS metal gate region are above the insulating layer; and a gate contact between the NMOS metal gate region and the PMOS metal gate region.
Public/Granted literature
- US20150054085A1 METHOD AND APPARATUS FOR SUPPRESSING METAL-GATE CROSS-DIFFUSION IN SEMICONDUCTOR TECHNOLOGY Public/Granted day:2015-02-26
Information query
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