Invention Grant
- Patent Title: Semiconductor device and a manufacturing method thereof
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Application No.: US14805218Application Date: 2015-07-21
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Publication No.: US09396971B2Publication Date: 2016-07-19
- Inventor: Yukihiro Sato , Nobuya Koike
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2012-066997 20120323
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L21/56 ; H01L21/58 ; H01L23/31 ; H01L23/00 ; H01L23/433 ; H01L25/065
Abstract:
There is provided a technology enabling the improvement of the reliability of a semiconductor device manufactured by physically fixing separately formed chip mounting portion and lead frame. A feature of an embodiment resides in that, a second junction portion formed in a suspension lead is fitted into a first junction portion formed in a chip mounting portion, thereby to physically fix the chip mounting portion and the suspension lead. Specifically, the first junction portion is formed of a concave part disposed in the surface of the chip mounting portion. The second junction portion forms a part of the suspension lead.
Public/Granted literature
- US20150325506A1 SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF Public/Granted day:2015-11-12
Information query
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