Invention Grant
- Patent Title: Semiconductor structure and manufacturing method of forming a large pattern and a plurality of fine gate lines located between the large patterns
- Patent Title (中): 形成大图案的半导体结构和制造方法以及位于大图案之间的多个精细栅极线
-
Application No.: US13657026Application Date: 2012-10-22
-
Publication No.: US09397209B2Publication Date: 2016-07-19
- Inventor: Teng-Hao Yeh , Yen-Hao Shih
- Applicant: MACRONIX INTERNATIONAL CO., LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: WPAT, PC
- Agent Justin King; Douglas A. Hosack
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/28 ; H01L21/033 ; H01L21/3213 ; H01L27/115
Abstract:
A semiconductor structure has a second portion with an appendage on one side of the second portion and extruding along the longitudinal direction of the second portion. Moreover the semiconductor structure also has a gate line longitudinally parallel to the second portion, wherein the length of the gate line equals to the longitudinal length of the second portion.
Public/Granted literature
- US20140110766A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2014-04-24
Information query
IPC分类:
