发明授权
US09431503B2 Integrating transistors with different poly-silicon heights on the same die
有权
将晶体管与不同的多晶硅高度集成在同一芯片上
- 专利标题： Integrating transistors with different poly-silicon heights on the same die
- 专利标题（中）： 将晶体管与不同的多晶硅高度集成在同一芯片上
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申请号： US14149521申请日： 2014-01-07
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公开(公告)号： US09431503B2公开(公告)日： 2016-08-30
- 发明人: Chuan Lin , Hidehiko Shiraiwa , Bradley Marc Davis , Lei Xue , Simon S. Chan , Kenichi Ohtsuka , Angela T. Hui , Scott Allan Bell
- 申请人： Cypress Semiconductor Corporation
- 申请人地址： US CA San Jose
- 专利权人： CYPRESS SEMICONDUCTOR CORPORATION
- 当前专利权人： CYPRESS SEMICONDUCTOR CORPORATION
- 当前专利权人地址： US CA San Jose
- 主分类号： H01L29/49
- IPC分类号： H01L29/49 ; H01L21/8234 ; H01L29/78 ; H01L27/115 ; H01L21/28
摘要：
An integrated circuit comprises a first poly-silicon region including a first poly-silicon layer, a second poly-silicon layer disposed over the first poly-silicon layer, a first poly-silicon finger associated with the first poly-silicon layer, and a second poly-silicon finger associated with the second poly-silicon layer. The first poly-silicon finger and the second poly-silicon finger are oriented in a substantially orthogonal manner relative to each other. The integrated circuit comprises a second poly-silicon gate region including the first poly-silicon layer. The first polysilicon gate region and the second polysilicon gate region each have different poly-silicon gate structures.
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