A method of operating a resistive memory device and a resistive memory system including a resistive memory device is for a resistive memory device including a plurality of bit lines and at least one dummy bit line. The method of operating the resistive memory device includes detecting a first address accompanying a first command, generating a plurality of inhibit voltages for biasing non-selected lines, and providing to a first dummy bit line a first inhibit voltage selected from among the plurality of inhibit voltages based on a result of detecting the first address.