Invention Grant
- Patent Title: Efficient locking of memory pages
- Patent Title (中): 高效锁定内存页面
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Application No.: US13996438Application Date: 2012-03-30
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Publication No.: US09465751B2Publication Date: 2016-10-11
- Inventor: Xiaowei Jiang , Hongliang Gao , Zhen Fang , Srihari Makineni , Ravishankar Iyer
- Applicant: Xiaowei Jiang , Hongliang Gao , Zhen Fang , Srihari Makineni , Ravishankar Iyer
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Nicholson De Vos Webster & Elliott LLP
- International Application: PCT/US2012/031651 WO 20120330
- International Announcement: WO2013/147882 WO 20131003
- Main IPC: G06F12/12
- IPC: G06F12/12 ; G06F12/14 ; G06F12/10
Abstract:
An apparatus is described that contains a processing core comprising a CPU core and at least one accelerator coupled to the CPU core. The CPU core comprises a pipeline having a translation look aside buffer. The CPU core comprising logic circuitry to set a lock bit in attribute data of an entry within the translation look-aside buffer entry to lock a page of memory reserved for the accelerator.
Public/Granted literature
- US20130311738A1 EFFICIENT LOCKING OF MEMORY PAGES Public/Granted day:2013-11-21
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