Invention Grant
US09478485B2 Semiconductor device and method of stacking semiconductor die on a fan-out WLCSP
有权
半导体器件和在扇出WLCSP上堆叠半导体管芯的方法
- Patent Title: Semiconductor device and method of stacking semiconductor die on a fan-out WLCSP
- Patent Title (中): 半导体器件和在扇出WLCSP上堆叠半导体管芯的方法
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Application No.: US14261252Application Date: 2014-04-24
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Publication No.: US09478485B2Publication Date: 2016-10-25
- Inventor: XuSheng Bao , KwokKeung Szeto
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/522 ; H01L23/00 ; H01L23/538 ; H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L21/683

Abstract:
A semiconductor device has a first semiconductor die. A first interconnect structure, such as a conductive pillar including a bump formed over the conductive pillar, and second interconnect structure are formed in a peripheral region of the first semiconductor die. A second semiconductor die is disposed over the first semiconductor die between the first interconnect structure and the second interconnect structure. A height of the second semiconductor die is less than a height of the first interconnect structure. A footprint of the second semiconductor die is smaller than a central region of the first semiconductor die. An encapsulant is deposited over the first semiconductor die and second semiconductor die. Alternatively, the second semiconductor die is disposed over a semiconductor package including a plurality of interconnect structures. External connectivity from the single side fo-WLCSP is performed without the use of conductive vias to provide a high throughput and device reliability.
Public/Granted literature
- US20150001709A1 Semiconductor Device and Method of Stacking Semiconductor Die on a Fan-Out WLCSP Public/Granted day:2015-01-01
Information query
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