Invention Grant
US09478524B2 Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same
有权
具有中间垂直侧芯片和半导体封装的多芯片半导体结构相同
- Patent Title: Multi-die semiconductor structure with intermediate vertical side chip and semiconductor package for same
- Patent Title (中): 具有中间垂直侧芯片和半导体封装的多芯片半导体结构相同
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Application No.: US14852013Application Date: 2015-09-11
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Publication No.: US09478524B2Publication Date: 2016-10-25
- Inventor: Bok Eng Cheah , Shanggar Periaman , Kooi Chi Ooi , Jackson Chung Peng Kong
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L25/065 ; H01L23/00 ; H01L25/00 ; H01L23/538 ; H01L23/31
Abstract:
Semiconductor multi-die structures having intermediate vertical side chips, and packages housing such semiconductor multi-die structures, are described. In an example, a multi-die semiconductor structure includes a first main stacked dies (MSD) structure having a first substantially horizontal arrangement of semiconductor dies. A second MSD structure having a second substantially horizontal arrangement of semiconductor dies is also included. An intermediate vertical side chip (i-VSC) is disposed between and electrically coupled to the first and second MSD structures.
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